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authorSuresh Gupta <suresh.gupta@nxp.com>2017-04-20 12:19:14 (GMT)
committerPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>2017-07-18 08:45:05 (GMT)
commitbf256a699070575d5c2282ddcdbb1515fab9f9a8 (patch)
tree0f082bc449bced0d08f097d643b2b8dbefc0f387 /drivers/mtd/spi/spi_flash_ids.c
parentcefc71f2fecfa43a4a7bb858aa9dd061f005b3ba (diff)
downloadu-boot-bf256a699070575d5c2282ddcdbb1515fab9f9a8.tar.xz
sf: add ADDR_4B for 4byte address support
Some new flash don't support bar register but use 4bytes address to support exceed 16MB flash size. So add flash flag: ADDR_4B for some flash which support 4bytes address. Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Diffstat (limited to 'drivers/mtd/spi/spi_flash_ids.c')
-rw-r--r--drivers/mtd/spi/spi_flash_ids.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index 7ca33e8..e45edeb 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -101,7 +101,7 @@ const struct spi_flash_info spi_flash_ids[] = {
{"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) },
{"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) },
{"s25fs256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
- {"s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256, RD_FULL | WR_QPP) },
+ {"s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256, RD_FULL | WR_QPP | ADDR_4B) },
{"s25fl512s_256k", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) },
{"s25fl512s_64k", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) },
{"s25fl512s_512k", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) },