diff options
author | Wolfgang Denk <wd@denx.de> | 2013-10-04 15:43:24 (GMT) |
---|---|---|
committer | Tom Rini <trini@ti.com> | 2013-10-14 20:06:54 (GMT) |
commit | 93e1459641e758d2b096d3f1b39414a39bb314f8 (patch) | |
tree | 3780156a164d3924a2412354872203e4b46f8592 /drivers/mtd | |
parent | 3765b3e7bd0f8e46914d417f29cbcb0c72b1acf7 (diff) | |
download | u-boot-93e1459641e758d2b096d3f1b39414a39bb314f8.tar.xz |
Coding Style cleanup: replace leading SPACEs by TABs
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Drop changes for PEP 4 following python tools]
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r-- | drivers/mtd/nand/fsl_elbc_spl.c | 20 | ||||
-rw-r--r-- | drivers/mtd/nand/fsl_upm.c | 8 | ||||
-rw-r--r-- | drivers/mtd/nand/nand_base.c | 2 | ||||
-rw-r--r-- | drivers/mtd/nand/nand_util.c | 4 | ||||
-rw-r--r-- | drivers/mtd/ubi/crc32.c | 4 |
5 files changed, 19 insertions, 19 deletions
diff --git a/drivers/mtd/nand/fsl_elbc_spl.c b/drivers/mtd/nand/fsl_elbc_spl.c index a7476b4..2952135 100644 --- a/drivers/mtd/nand/fsl_elbc_spl.c +++ b/drivers/mtd/nand/fsl_elbc_spl.c @@ -59,20 +59,20 @@ static int nand_load_image(uint32_t offs, unsigned int uboot_size, void *vdst) if (large) { fmr |= FMR_ECCM; out_be32(®s->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) | - (NAND_CMD_READSTART << FCR_CMD1_SHIFT)); + (NAND_CMD_READSTART << FCR_CMD1_SHIFT)); out_be32(®s->fir, - (FIR_OP_CW0 << FIR_OP0_SHIFT) | - (FIR_OP_CA << FIR_OP1_SHIFT) | - (FIR_OP_PA << FIR_OP2_SHIFT) | - (FIR_OP_CW1 << FIR_OP3_SHIFT) | - (FIR_OP_RBW << FIR_OP4_SHIFT)); + (FIR_OP_CW0 << FIR_OP0_SHIFT) | + (FIR_OP_CA << FIR_OP1_SHIFT) | + (FIR_OP_PA << FIR_OP2_SHIFT) | + (FIR_OP_CW1 << FIR_OP3_SHIFT) | + (FIR_OP_RBW << FIR_OP4_SHIFT)); } else { out_be32(®s->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT); out_be32(®s->fir, - (FIR_OP_CW0 << FIR_OP0_SHIFT) | - (FIR_OP_CA << FIR_OP1_SHIFT) | - (FIR_OP_PA << FIR_OP2_SHIFT) | - (FIR_OP_RBW << FIR_OP3_SHIFT)); + (FIR_OP_CW0 << FIR_OP0_SHIFT) | + (FIR_OP_CA << FIR_OP1_SHIFT) | + (FIR_OP_PA << FIR_OP2_SHIFT) | + (FIR_OP_RBW << FIR_OP3_SHIFT)); } out_be32(®s->fbcr, 0); diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c index a0fe1e0..3ae0044 100644 --- a/drivers/mtd/nand/fsl_upm.c +++ b/drivers/mtd/nand/fsl_upm.c @@ -112,10 +112,10 @@ static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) fsl_upm_run_pattern(&fun->upm, fun->width, io_addr, mar); /* - * Some boards/chips needs this. At least the MPC8360E-RDK - * needs it. Probably weird chip, because I don't see any - * need for this on MPC8555E + Samsung K9F1G08U0A. Usually - * here are 0-2 unexpected busy states per block read. + * Some boards/chips needs this. At least the MPC8360E-RDK + * needs it. Probably weird chip, because I don't see any + * need for this on MPC8555E + Samsung K9F1G08U0A. Usually + * here are 0-2 unexpected busy states per block read. */ if (fun->wait_flags & FSL_UPM_WAIT_RUN_PATTERN) fun_wait(fun); diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index d4d586c..1ce55fd 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -3282,7 +3282,7 @@ int nand_scan_tail(struct mtd_info *mtd) case NAND_ECC_NONE: pr_warn("NAND_ECC_NONE selected by board driver. " - "This is not recommended !!\n"); + "This is not recommended !!\n"); chip->ecc.read_page = nand_read_page_raw; chip->ecc.write_page = nand_write_page_raw; chip->ecc.read_oob = nand_read_oob_std; diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c index d149a6d..5246bbf 100644 --- a/drivers/mtd/nand/nand_util.c +++ b/drivers/mtd/nand/nand_util.c @@ -142,8 +142,8 @@ int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts) ops.mode = MTD_OPS_AUTO_OOB; result = mtd_write_oob(meminfo, - erase.addr, - &ops); + erase.addr, + &ops); if (result != 0) { printf("\n%s: MTD writeoob failure: %d\n", mtd_device, result); diff --git a/drivers/mtd/ubi/crc32.c b/drivers/mtd/ubi/crc32.c index ab439b3..f1bebf5 100644 --- a/drivers/mtd/ubi/crc32.c +++ b/drivers/mtd/ubi/crc32.c @@ -102,7 +102,7 @@ u32 crc32_le(u32 crc, unsigned char const *p, size_t len) if((len >= 4)){ /* load data 32 bits wide, xor data 32 bits wide. */ size_t save_len = len & 3; - len = len >> 2; + len = len >> 2; --b; /* use pre increment below(*++b) for speed */ do { crc ^= *++b; @@ -200,7 +200,7 @@ u32 __attribute_pure__ crc32_be(u32 crc, unsigned char const *p, size_t len) if(likely(len >= 4)){ /* load data 32 bits wide, xor data 32 bits wide. */ size_t save_len = len & 3; - len = len >> 2; + len = len >> 2; --b; /* use pre increment below(*++b) for speed */ do { crc ^= *++b; |