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author | Paul Kocialkowski <contact@paulk.fr> | 2015-03-22 17:12:22 (GMT) |
---|---|---|
committer | Hans de Goede <hdegoede@redhat.com> | 2015-04-15 14:17:17 (GMT) |
commit | 487b3277d4f70bcb2e4a1930beb6438565f25910 (patch) | |
tree | cc74dd0cd05c1be8af48cd1ca95c4b6f949b8712 /drivers/net | |
parent | 81f11872f3315a767940820e46d1a15b42d9b60c (diff) | |
download | u-boot-487b3277d4f70bcb2e4a1930beb6438565f25910.tar.xz |
sunxi: GPIO pin mux hardware-feature-specific function index defines
Each hardware feature exposed through the GPIO pin mux is usually using the same
function index (for a given port), so there is no need to define one value per
pin: one value per hardware feature per port is sufficient, avoids duplication
and makes everything easier to understand.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/sunxi_emac.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/sunxi_emac.c b/drivers/net/sunxi_emac.c index 5a06d68..2a9fd56 100644 --- a/drivers/net/sunxi_emac.c +++ b/drivers/net/sunxi_emac.c @@ -497,7 +497,7 @@ int sunxi_emac_initialize(void) /* Configure pin mux settings for MII Ethernet */ for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(17); pin++) - sunxi_gpio_set_cfgpin(pin, SUNXI_GPA0_EMAC); + sunxi_gpio_set_cfgpin(pin, SUNXI_GPA_EMAC); /* Set up clock gating */ setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_EMAC); |