diff options
author | Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> | 2016-03-25 07:23:44 (GMT) |
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committer | Michal Simek <michal.simek@xilinx.com> | 2016-04-04 18:28:39 (GMT) |
commit | 845ee5f623861ec274466f85b967d744c5b811e0 (patch) | |
tree | f4ebf766b7bd16a72ffa558a05f0af53fc693e85 /drivers/net | |
parent | 85b949f40b0688b58af0c02e4e3b38596b4376fb (diff) | |
download | u-boot-845ee5f623861ec274466f85b967d744c5b811e0.tar.xz |
net: zynq_gem: Add SGMII support for zynqMP
PCS auto negotaiation bit should be enabled
along with SGMII autonegotation enabled
in phy.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/zynq_gem.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 52a8f27..aec8077 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -93,6 +93,8 @@ DECLARE_GLOBAL_DATA_PTR; #define ZYNQ_GEM_TSR_DONE 0x00000020 /* Tx done mask */ +#define ZYNQ_GEM_PCS_CTL_ANEG_ENBL 0x1000 + /* Use MII register 1 (MII status register) to detect PHY */ #define PHY_DETECT_REG 1 @@ -139,7 +141,9 @@ struct zynq_gem_regs { u32 reserved6[18]; #define STAT_SIZE 44 u32 stat[STAT_SIZE]; /* 0x100 - Octects transmitted Low reg */ - u32 reserved7[164]; + u32 reserved9[20]; + u32 pcscntrl; + u32 reserved7[143]; u32 transmit_q1_ptr; /* 0x440 - Transmit priority queue 1 */ u32 reserved8[15]; u32 receive_q1_ptr; /* 0x480 - Receive priority queue 1 */ @@ -432,9 +436,14 @@ static int zynq_gem_init(struct udevice *dev) nwconfig = ZYNQ_GEM_NWCFG_INIT; - if (priv->interface == PHY_INTERFACE_MODE_SGMII) + if (priv->interface == PHY_INTERFACE_MODE_SGMII) { nwconfig |= ZYNQ_GEM_NWCFG_SGMII_ENBL | ZYNQ_GEM_NWCFG_PCS_SEL; +#ifdef CONFIG_ARM64 + writel(readl(®s->pcscntrl) | ZYNQ_GEM_PCS_CTL_ANEG_ENBL, + ®s->pcscntrl); +#endif + } switch (priv->phydev->speed) { case SPEED_1000: |