summaryrefslogtreecommitdiff
path: root/drivers/pci
diff options
context:
space:
mode:
authorSimon Glass <sjg@chromium.org>2017-01-17 23:52:55 (GMT)
committerSimon Glass <sjg@chromium.org>2017-02-08 13:12:14 (GMT)
commite160f7d430f163bc42757aff3bf2bcac0a459f02 (patch)
treece006f94b4a52f6fff567eacd86922c3be6df706 /drivers/pci
parent8aa41363ebf46b9ff63b311bd2aa793c67a49def (diff)
downloadu-boot-e160f7d430f163bc42757aff3bf2bcac0a459f02.tar.xz
dm: core: Replace of_offset with accessor
At present devices use a simple integer offset to record the device tree node associated with the device. In preparation for supporting a live device tree, which uses a node pointer instead, refactor existing code to access this field through an inline function. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/pci-uclass.c9
-rw-r--r--drivers/pci/pci_tegra.c2
-rw-r--r--drivers/pci/pcie_layerscape.c2
-rw-r--r--drivers/pci/pcie_xilinx.c2
4 files changed, 8 insertions, 7 deletions
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 3b00e6a..a1408f5 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -839,8 +839,9 @@ static int pci_uclass_pre_probe(struct udevice *bus)
/* For bridges, use the top-level PCI controller */
if (!device_is_on_pci_bus(bus)) {
hose->ctlr = bus;
- ret = decode_regions(hose, gd->fdt_blob, bus->parent->of_offset,
- bus->of_offset);
+ ret = decode_regions(hose, gd->fdt_blob,
+ dev_of_offset(bus->parent),
+ dev_of_offset(bus));
if (ret) {
debug("%s: Cannot decode regions\n", __func__);
return ret;
@@ -903,7 +904,7 @@ static int pci_uclass_child_post_bind(struct udevice *dev)
struct fdt_pci_addr addr;
int ret;
- if (dev->of_offset == -1)
+ if (dev_of_offset(dev) == -1)
return 0;
/*
@@ -911,7 +912,7 @@ static int pci_uclass_child_post_bind(struct udevice *dev)
* just check the address.
*/
pplat = dev_get_parent_platdata(dev);
- ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset,
+ ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev),
FDT_PCI_SPACE_CONFIG, "reg", &addr);
if (ret) {
diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c
index 430270e..7d9c63b 100644
--- a/drivers/pci/pci_tegra.c
+++ b/drivers/pci/pci_tegra.c
@@ -1099,7 +1099,7 @@ static int pci_tegra_ofdata_to_platdata(struct udevice *dev)
INIT_LIST_HEAD(&pcie->ports);
- if (tegra_pcie_parse_dt(gd->fdt_blob, dev->of_offset, id, pcie))
+ if (tegra_pcie_parse_dt(gd->fdt_blob, dev_of_offset(dev), id, pcie))
return -EINVAL;
return 0;
diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c
index 90b9fe2..b6806cf 100644
--- a/drivers/pci/pcie_layerscape.c
+++ b/drivers/pci/pcie_layerscape.c
@@ -438,7 +438,7 @@ static int ls_pcie_probe(struct udevice *dev)
{
struct ls_pcie *pcie = dev_get_priv(dev);
const void *fdt = gd->fdt_blob;
- int node = dev->of_offset;
+ int node = dev_of_offset(dev);
u8 header_type;
u16 link_sta;
bool ep_mode;
diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c
index 5216001..08e2e93 100644
--- a/drivers/pci/pcie_xilinx.c
+++ b/drivers/pci/pcie_xilinx.c
@@ -186,7 +186,7 @@ static int pcie_xilinx_ofdata_to_platdata(struct udevice *dev)
DECLARE_GLOBAL_DATA_PTR;
int err;
- err = fdt_get_resource(gd->fdt_blob, dev->of_offset, "reg",
+ err = fdt_get_resource(gd->fdt_blob, dev_of_offset(dev), "reg",
0, &reg_res);
if (err < 0) {
error("\"reg\" resource not found\n");