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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-09-16 18:32:58 (GMT)
committerMasahiro Yamada <yamada.masahiro@socionext.com>2016-09-18 14:10:11 (GMT)
commitbbb119800f5ce8a291d707fd1a8e753959a93fd1 (patch)
tree1dbbd803c23aa81aa1d9214e0d20730bcab04e80 /drivers/pinctrl/ath79
parentf6bbec3d5c12457e2ce207f662e65e7da70254ce (diff)
downloadu-boot-bbb119800f5ce8a291d707fd1a8e753959a93fd1.tar.xz
pinctrl: uniphier: support 4bit-width pin-mux register capability
On LD4 SoC or later, the pin-mux registers are 8bit wide, while 4bit wide on sLD3 SoC. Support it for the sLD3 pinctrl driver. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'drivers/pinctrl/ath79')
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