diff options
author | Andreas Engel <andreas.engel@ericsson.com> | 2008-09-08 08:17:31 (GMT) |
---|---|---|
committer | Wolfgang Denk <wd@denx.de> | 2008-09-09 12:41:11 (GMT) |
commit | 20c9226cb8cab08a111ee73db04e62d943ee0c97 (patch) | |
tree | 7aaf06027f305b55960e9d63774f16b71afa7108 /drivers/serial | |
parent | 0817d688f307ee2c0598e79175c94a40ce90337b (diff) | |
download | u-boot-20c9226cb8cab08a111ee73db04e62d943ee0c97.tar.xz |
Merged serial_pl010.c and serial_pl011.c.
They only differ in the init function.
This also adds the missing watchdog support for the PL011.
Signed-off-by: Andreas Engel <andreas.engel@ericsson.com>
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/Makefile | 3 | ||||
-rw-r--r-- | drivers/serial/serial_pl011.c | 161 | ||||
-rw-r--r-- | drivers/serial/serial_pl01x.c (renamed from drivers/serial/serial_pl010.c) | 83 | ||||
-rw-r--r-- | drivers/serial/serial_pl01x.h (renamed from drivers/serial/serial_pl011.h) | 0 |
4 files changed, 69 insertions, 178 deletions
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index f30014d..3cc1999 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -33,8 +33,7 @@ COBJS-$(CONFIG_DRIVER_S3C4510_UART) += s3c4510b_uart.o COBJS-$(CONFIG_S3C64XX) += s3c64xx.o COBJS-y += serial.o COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o -COBJS-y += serial_pl010.o -COBJS-y += serial_pl011.o +COBJS-y += serial_pl01x.o COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o COBJS-$(CONFIG_USB_TTY) += usbtty.o diff --git a/drivers/serial/serial_pl011.c b/drivers/serial/serial_pl011.c deleted file mode 100644 index 4d35fe5..0000000 --- a/drivers/serial/serial_pl011.c +++ /dev/null @@ -1,161 +0,0 @@ -/* - * (C) Copyright 2000 - * Rob Taylor, Flying Pig Systems. robt@flyingpig.com. - * - * (C) Copyright 2004 - * ARM Ltd. - * Philippe Robin, <philippe.robin@arm.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* Simple U-Boot driver for the PrimeCell PL011 UARTs on the IntegratorCP */ -/* Should be fairly simple to make it work with the PL010 as well */ - -#include <common.h> - -#ifdef CFG_PL011_SERIAL - -#include "serial_pl011.h" - -#define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val)) -#define IO_READ(addr) (*(volatile unsigned int *)(addr)) - -/* - * IntegratorCP has two UARTs, use the first one, at 38400-8-N-1 - * Versatile PB has four UARTs. - */ - -#define CONSOLE_PORT CONFIG_CONS_INDEX -#define baudRate CONFIG_BAUDRATE -static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS; -#define NUM_PORTS (sizeof(port)/sizeof(port[0])) - -static void pl011_putc (int portnum, char c); -static int pl011_getc (int portnum); -static int pl011_tstc (int portnum); - - -int serial_init (void) -{ - unsigned int temp; - unsigned int divider; - unsigned int remainder; - unsigned int fraction; - - /* - ** First, disable everything. - */ - IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, 0x0); - - /* - ** Set baud rate - ** - ** IBRD = UART_CLK / (16 * BAUD_RATE) - ** FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE)) - */ - temp = 16 * baudRate; - divider = CONFIG_PL011_CLOCK / temp; - remainder = CONFIG_PL011_CLOCK % temp; - temp = (8 * remainder) / baudRate; - fraction = (temp >> 1) + (temp & 1); - - IO_WRITE (port[CONSOLE_PORT] + UART_PL011_IBRD, divider); - IO_WRITE (port[CONSOLE_PORT] + UART_PL011_FBRD, fraction); - - /* - ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled. - */ - IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH, - (UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN)); - - /* - ** Finally, enable the UART - */ - IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, - (UART_PL011_CR_UARTEN | UART_PL011_CR_TXE | - UART_PL011_CR_RXE)); - - return 0; -} - -void serial_putc (const char c) -{ - if (c == '\n') - pl011_putc (CONSOLE_PORT, '\r'); - - pl011_putc (CONSOLE_PORT, c); -} - -void serial_puts (const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - -int serial_getc (void) -{ - return pl011_getc (CONSOLE_PORT); -} - -int serial_tstc (void) -{ - return pl011_tstc (CONSOLE_PORT); -} - -void serial_setbrg (void) -{ -} - -static void pl011_putc (int portnum, char c) -{ - /* Wait until there is space in the FIFO */ - while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF); - - /* Send the character */ - IO_WRITE (port[portnum] + UART_PL01x_DR, c); -} - -static int pl011_getc (int portnum) -{ - unsigned int data; - - /* Wait until there is data in the FIFO */ - while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE); - - data = IO_READ (port[portnum] + UART_PL01x_DR); - - /* Check for an error flag */ - if (data & 0xFFFFFF00) { - /* Clear the error */ - IO_WRITE (port[portnum] + UART_PL01x_ECR, 0xFFFFFFFF); - return -1; - } - - return (int) data; -} - -static int pl011_tstc (int portnum) -{ - return !(IO_READ (port[portnum] + UART_PL01x_FR) & - UART_PL01x_FR_RXFE); -} - -#endif diff --git a/drivers/serial/serial_pl010.c b/drivers/serial/serial_pl01x.c index 134ed09..d0497ec 100644 --- a/drivers/serial/serial_pl010.c +++ b/drivers/serial/serial_pl01x.c @@ -31,24 +31,28 @@ #include <common.h> #include <watchdog.h> -#ifdef CFG_PL010_SERIAL +#if defined(CFG_PL010_SERIAL) || defined(CFG_PL011_SERIAL) -#include "serial_pl011.h" +#include "serial_pl01x.h" #define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val)) #define IO_READ(addr) (*(volatile unsigned int *)(addr)) -/* Integrator AP has two UARTs, we use the first one, at 38400-8-N-1 */ +/* + * Integrator AP has two UARTs, we use the first one, at 38400-8-N-1 + * Integrator CP has two UARTs, use the first one, at 38400-8-N-1 + * Versatile PB has four UARTs. + */ #define CONSOLE_PORT CONFIG_CONS_INDEX #define baudRate CONFIG_BAUDRATE static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS; #define NUM_PORTS (sizeof(port)/sizeof(port[0])) +static void pl01x_putc (int portnum, char c); +static int pl01x_getc (int portnum); +static int pl01x_tstc (int portnum); -static void pl010_putc (int portnum, char c); -static int pl010_getc (int portnum); -static int pl010_tstc (int portnum); - +#ifdef CFG_PL010_SERIAL int serial_init (void) { @@ -103,15 +107,64 @@ int serial_init (void) */ IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, (UART_PL010_CR_UARTEN)); - return (0); + return 0; } +#endif /* CFG_PL010_SERIAL */ + +#ifdef CFG_PL011_SERIAL + +int serial_init (void) +{ + unsigned int temp; + unsigned int divider; + unsigned int remainder; + unsigned int fraction; + + /* + ** First, disable everything. + */ + IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, 0x0); + + /* + ** Set baud rate + ** + ** IBRD = UART_CLK / (16 * BAUD_RATE) + ** FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE)) + */ + temp = 16 * baudRate; + divider = CONFIG_PL011_CLOCK / temp; + remainder = CONFIG_PL011_CLOCK % temp; + temp = (8 * remainder) / baudRate; + fraction = (temp >> 1) + (temp & 1); + + IO_WRITE (port[CONSOLE_PORT] + UART_PL011_IBRD, divider); + IO_WRITE (port[CONSOLE_PORT] + UART_PL011_FBRD, fraction); + + /* + ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled. + */ + IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH, + (UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN)); + + /* + ** Finally, enable the UART + */ + IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, + (UART_PL011_CR_UARTEN | UART_PL011_CR_TXE | + UART_PL011_CR_RXE)); + + return 0; +} + +#endif /* CFG_PL011_SERIAL */ + void serial_putc (const char c) { if (c == '\n') - pl010_putc (CONSOLE_PORT, '\r'); + pl01x_putc (CONSOLE_PORT, '\r'); - pl010_putc (CONSOLE_PORT, c); + pl01x_putc (CONSOLE_PORT, c); } void serial_puts (const char *s) @@ -123,19 +176,19 @@ void serial_puts (const char *s) int serial_getc (void) { - return pl010_getc (CONSOLE_PORT); + return pl01x_getc (CONSOLE_PORT); } int serial_tstc (void) { - return pl010_tstc (CONSOLE_PORT); + return pl01x_tstc (CONSOLE_PORT); } void serial_setbrg (void) { } -static void pl010_putc (int portnum, char c) +static void pl01x_putc (int portnum, char c) { /* Wait until there is space in the FIFO */ while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF) @@ -145,7 +198,7 @@ static void pl010_putc (int portnum, char c) IO_WRITE (port[portnum] + UART_PL01x_DR, c); } -static int pl010_getc (int portnum) +static int pl01x_getc (int portnum) { unsigned int data; @@ -165,7 +218,7 @@ static int pl010_getc (int portnum) return (int) data; } -static int pl010_tstc (int portnum) +static int pl01x_tstc (int portnum) { WATCHDOG_RESET(); return !(IO_READ (port[portnum] + UART_PL01x_FR) & diff --git a/drivers/serial/serial_pl011.h b/drivers/serial/serial_pl01x.h index 5f20fdd..5f20fdd 100644 --- a/drivers/serial/serial_pl011.h +++ b/drivers/serial/serial_pl01x.h |