diff options
author | wdenk <wdenk> | 2003-12-06 23:20:41 (GMT) |
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committer | wdenk <wdenk> | 2003-12-06 23:20:41 (GMT) |
commit | 8bf3b005ddee3eee179ec961e1c2bd0693e3b79d (patch) | |
tree | 89b47bf5457d76bcaf63a38f1087529e1a9de931 /drivers/smc91111.c | |
parent | a8c7c708a9e0051c6358718c53572a4681eaa22b (diff) | |
download | u-boot-8bf3b005ddee3eee179ec961e1c2bd0693e3b79d.tar.xz |
* Patches by Stephan Linz, 3 Nov 2003:
- more endianess fixes for LAN91C111 driver
- CFG_HZ configuration patch for NIOS Cyclone board
* Patch by Stephan Linz, 28 Oct 2003:
fix PHY_INT_REG vs. PHY_MASK_REG bug in drivers/smc91111.c
* Patch by Steven Scholz, 20 Oct 2003:
- make "mii info <addr>" show infor for PHY at "addr" only
- Endian fix for miiphy_info()
Diffstat (limited to 'drivers/smc91111.c')
-rw-r--r-- | drivers/smc91111.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/smc91111.c b/drivers/smc91111.c index 3146ff4..6c3a0b7 100644 --- a/drivers/smc91111.c +++ b/drivers/smc91111.c @@ -71,10 +71,12 @@ #define NO_AUTOPROBE +#define SMC_DEBUG 0 + +#if SMC_DEBUG > 1 static const char version[] = "smc91111.c:v1.0 04/25/01 by Daris A Nevil (dnevil@snmc.com)\n"; - -#define SMC_DEBUG 0 +#endif /*------------------------------------------------------------------------ . @@ -212,7 +214,7 @@ int get_rom_mac(char *v_rom_mac); ------------------------------------------------------------ */ -static char smc_mac_addr[] = {0x02, 0x80, 0xad, 0x20, 0x31, 0xb8}; +static char unsigned smc_mac_addr[6] = {0x02, 0x80, 0xad, 0x20, 0x31, 0xb8}; /* * This function must be called before smc_open() if you want to override @@ -623,7 +625,7 @@ again: return 0; } else { /* ack. int */ - SMC_outw (IM_TX_INT, SMC91111_INT_REG); + SMC_outb (IM_TX_INT, SMC91111_INT_REG); PRINTK2 ("%s: Sent packet of length %d \n", SMC_DEV_NAME, length); @@ -729,7 +731,6 @@ static int smc_rcv() dword stat_len; #endif - SMC_SELECT_BANK(2); packet_number = SMC_inw( RXFIFO_REG ); @@ -1223,7 +1224,7 @@ static void smc_phy_configure () /* Enable PHY Interrupts (for register 18) */ /* Interrupts listed here are disabled */ - smc_write_phy_register (PHY_INT_REG, 0xffff); + smc_write_phy_register (PHY_MASK_REG, 0xffff); /* Configure the Receive/Phy Control register */ SMC_SELECT_BANK (0); |