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author | Simon Glass <sjg@chromium.org> | 2016-01-22 02:44:04 (GMT) |
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committer | Simon Glass <sjg@chromium.org> | 2016-01-22 03:42:35 (GMT) |
commit | 2b9fe111ec47750d9d7912246d983a7f9e096df6 (patch) | |
tree | baae00f09b93e4f948904c9f2c6b9106da38b052 /drivers/spi/rk_spi.c | |
parent | 28a943c11018f7e2946f3a529de87102f268cedb (diff) | |
download | u-boot-2b9fe111ec47750d9d7912246d983a7f9e096df6.tar.xz |
rockchip: spi: Correct the bus init code
Two of the init values are created locally so cannot be out of range.
The masking is unnecessary and in one case is incorrect. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/spi/rk_spi.c')
-rw-r--r-- | drivers/spi/rk_spi.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c index aaf139d..3418f9b 100644 --- a/drivers/spi/rk_spi.c +++ b/drivers/spi/rk_spi.c @@ -221,7 +221,7 @@ static int rockchip_spi_claim_bus(struct udevice *dev) ctrlr0 = OMOD_MASTER << OMOD_SHIFT; /* Data Frame Size */ - ctrlr0 |= spi_dfs & DFS_MASK << DFS_SHIFT; + ctrlr0 |= spi_dfs << DFS_SHIFT; /* set SPI mode 0..3 */ if (priv->mode & SPI_CPOL) @@ -242,7 +242,7 @@ static int rockchip_spi_claim_bus(struct udevice *dev) ctrlr0 |= FBM_MSB << FBM_SHIFT; /* Byte and Halfword Transform */ - ctrlr0 |= (spi_tf & HALF_WORD_MASK) << HALF_WORD_TX_SHIFT; + ctrlr0 |= spi_tf << HALF_WORD_TX_SHIFT; /* Rxd Sample Delay */ ctrlr0 |= 0 << RXDSD_SHIFT; |