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authorAnatolij Gustschin <agust@denx.de>2011-01-20 07:53:06 (GMT)
committerAlbert Aribaud <albert.aribaud@free.fr>2011-02-01 23:54:43 (GMT)
commitdff0109496846fd9787b6cdc0941217ecdf0ae28 (patch)
tree5a61d1b8a4a9cf1c5079fb8221db4816f0a70d5a /drivers/spi
parentc9d59c7fbe07aa9c519cf113107851cf4b3e1f54 (diff)
downloadu-boot-dff0109496846fd9787b6cdc0941217ecdf0ae28.tar.xz
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case
We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/mxc_spi.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index 5670714..dadf228 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -372,9 +372,8 @@ int spi_xchg_single(struct spi_slave *slave, unsigned int bitlen,
/* Buffer is not 32-bit aligned */
if ((unsigned long)dout & 0x03) {
data = 0;
- for (i = 0; i < 4; i++, data <<= 8) {
+ for (i = 0; i < 4; i++)
data = (data << 8) | (*dout++ & 0xFF);
- }
} else {
data = *(u32 *)dout;
data = cpu_to_be32(data);
@@ -405,11 +404,11 @@ int spi_xchg_single(struct spi_slave *slave, unsigned int bitlen,
if (bitlen % 32) {
data = reg_read(mxcs->base + MXC_CSPIRXDATA);
cnt = (bitlen % 32) / 8;
+ data = cpu_to_be32(data) >> ((sizeof(data) - cnt) * 8);
debug("SPI Rx unaligned: 0x%x\n", data);
if (din) {
- for (i = 0; i < cnt; i++, data >>= 8) {
- *din++ = data & 0xFF;
- }
+ memcpy(din, &data, cnt);
+ din += cnt;
}
nbytes -= cnt;
}