diff options
author | Tom Rini <trini@konsulko.com> | 2016-06-19 03:46:21 (GMT) |
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committer | Tom Rini <trini@konsulko.com> | 2016-06-19 03:46:21 (GMT) |
commit | a10a31ec91ad2ee514a42baea9314553aa972676 (patch) | |
tree | 4fa6eff1efde896343c455854b5c78b2b91bd9e9 /drivers/usb | |
parent | 2372b0012925f9100980151f4a28347c82feaba8 (diff) | |
parent | 1e6fb0e367564d427d7c57fa7b3b972ecb7147a3 (diff) | |
download | u-boot-a10a31ec91ad2ee514a42baea9314553aa972676.tar.xz |
Merge branch 'master' of git://git.denx.de/u-boot-usb
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
Diffstat (limited to 'drivers/usb')
-rw-r--r-- | drivers/usb/common/Makefile | 4 | ||||
-rw-r--r-- | drivers/usb/common/fsl-dt-fixup.c | 100 | ||||
-rw-r--r-- | drivers/usb/common/fsl-errata.c | 193 | ||||
-rw-r--r-- | drivers/usb/gadget/Kconfig | 10 | ||||
-rw-r--r-- | drivers/usb/gadget/dwc2_udc_otg.c | 4 | ||||
-rw-r--r-- | drivers/usb/host/ehci-hcd.c | 3 | ||||
-rw-r--r-- | drivers/usb/host/xhci-fsl.c | 24 |
7 files changed, 299 insertions, 39 deletions
diff --git a/drivers/usb/common/Makefile b/drivers/usb/common/Makefile index 2f46d38..aee7e32 100644 --- a/drivers/usb/common/Makefile +++ b/drivers/usb/common/Makefile @@ -4,5 +4,5 @@ # obj-$(CONFIG_DM_USB) += common.o -obj-$(CONFIG_USB_EHCI_FSL) += fsl-dt-fixup.o -obj-$(CONFIG_USB_XHCI_FSL) += fsl-dt-fixup.o +obj-$(CONFIG_USB_EHCI_FSL) += fsl-dt-fixup.o fsl-errata.o +obj-$(CONFIG_USB_XHCI_FSL) += fsl-dt-fixup.o fsl-errata.o diff --git a/drivers/usb/common/fsl-dt-fixup.c b/drivers/usb/common/fsl-dt-fixup.c index 6f31932..9c48852 100644 --- a/drivers/usb/common/fsl-dt-fixup.c +++ b/drivers/usb/common/fsl-dt-fixup.c @@ -12,6 +12,7 @@ #include <usb.h> #include <asm/io.h> #include <hwconfig.h> +#include <fsl_errata.h> #include <fsl_usb.h> #include <fdt_support.h> @@ -19,10 +20,16 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #endif +/* USB Controllers */ +#define FSL_USB2_MPH "fsl-usb2-mph" +#define FSL_USB2_DR "fsl-usb2-dr" +#define CHIPIDEA_USB2 "chipidea,usb2" +#define SNPS_DWC3 "snps,dwc3" + static const char * const compat_usb_fsl[] = { - "fsl-usb2-mph", - "fsl-usb2-dr", - "snps,dwc3", + FSL_USB2_MPH, + FSL_USB2_DR, + SNPS_DWC3, NULL }; @@ -80,16 +87,24 @@ static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode, } static int fdt_fixup_usb_erratum(void *blob, const char *prop_erratum, - int start_offset) + const char *controller_type, int start_offset) { int node_offset, err; const char *node_type = NULL; + const char *node_name = NULL; err = fdt_usb_get_node_type(blob, start_offset, &node_offset, &node_type); if (err < 0) return err; + if (!strcmp(node_type, FSL_USB2_MPH) || !strcmp(node_type, FSL_USB2_DR)) + node_name = CHIPIDEA_USB2; + else + node_name = node_type; + if (strcmp(node_name, controller_type)) + return err; + err = fdt_setprop(blob, node_offset, prop_erratum, NULL, 0); if (err < 0) { printf("ERROR: could not set %s for %s: %s.\n", @@ -99,6 +114,23 @@ static int fdt_fixup_usb_erratum(void *blob, const char *prop_erratum, return node_offset; } +static int fdt_fixup_erratum(int *usb_erratum_off, void *blob, + const char *controller_type, char *str, + bool (*has_erratum)(void)) +{ + char buf[32] = {0}; + + snprintf(buf, sizeof(buf), "fsl,usb-erratum-%s", str); + if (!has_erratum()) + return -EINVAL; + *usb_erratum_off = fdt_fixup_usb_erratum(blob, buf, controller_type, + *usb_erratum_off); + if (*usb_erratum_off < 0) + return -ENOSPC; + debug("Adding USB erratum %s\n", str); + return 0; +} + void fdt_fixup_dr_usb(void *blob, bd_t *bd) { static const char * const modes[] = { "host", "peripheral", "otg" }; @@ -107,10 +139,12 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd) int usb_erratum_a007075_off = -1; int usb_erratum_a007792_off = -1; int usb_erratum_a005697_off = -1; + int usb_erratum_a008751_off = -1; int usb_mode_off = -1; int usb_phy_off = -1; char str[5]; int i, j; + int ret; for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) { const char *dr_mode_type = NULL; @@ -164,39 +198,31 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd) if (usb_phy_off < 0) return; - if (has_erratum_a006261()) { - usb_erratum_a006261_off = fdt_fixup_usb_erratum - (blob, - "fsl,usb-erratum-a006261", - usb_erratum_a006261_off); - if (usb_erratum_a006261_off < 0) - return; - } - - if (has_erratum_a007075()) { - usb_erratum_a007075_off = fdt_fixup_usb_erratum - (blob, - "fsl,usb-erratum-a007075", - usb_erratum_a007075_off); - if (usb_erratum_a007075_off < 0) - return; - } + ret = fdt_fixup_erratum(&usb_erratum_a006261_off, blob, + CHIPIDEA_USB2, "a006261", + has_erratum_a006261); + if (ret == -ENOSPC) + return; + ret = fdt_fixup_erratum(&usb_erratum_a007075_off, blob, + CHIPIDEA_USB2, "a007075", + has_erratum_a007075); + if (ret == -ENOSPC) + return; + ret = fdt_fixup_erratum(&usb_erratum_a007792_off, blob, + CHIPIDEA_USB2, "a007792", + has_erratum_a007792); + if (ret == -ENOSPC) + return; + ret = fdt_fixup_erratum(&usb_erratum_a005697_off, blob, + CHIPIDEA_USB2, "a005697", + has_erratum_a005697); + if (ret == -ENOSPC) + return; + ret = fdt_fixup_erratum(&usb_erratum_a008751_off, blob, + SNPS_DWC3, "a008751", + has_erratum_a008751); + if (ret == -ENOSPC) + return; - if (has_erratum_a007792()) { - usb_erratum_a007792_off = fdt_fixup_usb_erratum - (blob, - "fsl,usb-erratum-a007792", - usb_erratum_a007792_off); - if (usb_erratum_a007792_off < 0) - return; - } - if (has_erratum_a005697()) { - usb_erratum_a005697_off = fdt_fixup_usb_erratum - (blob, - "fsl,usb-erratum-a005697", - usb_erratum_a005697_off); - if (usb_erratum_a005697_off < 0) - return; - } } } diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c new file mode 100644 index 0000000..ebe60a8 --- /dev/null +++ b/drivers/usb/common/fsl-errata.c @@ -0,0 +1,193 @@ +/* + * Freescale USB Controller + * + * Copyright 2013 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <fsl_errata.h> +#include<fsl_usb.h> + +/* USB Erratum Checking code */ +#if defined(CONFIG_PPC) || defined(CONFIG_ARM) +bool has_dual_phy(void) +{ + u32 svr = get_svr(); + u32 soc = SVR_SOC_VER(svr); + + switch (soc) { +#ifdef CONFIG_PPC + case SVR_T1023: + case SVR_T1024: + case SVR_T1013: + case SVR_T1014: + return IS_SVR_REV(svr, 1, 0); + case SVR_T1040: + case SVR_T1042: + case SVR_T1020: + case SVR_T1022: + case SVR_T2080: + case SVR_T2081: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1); + case SVR_T4240: + case SVR_T4160: + case SVR_T4080: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); +#endif + } + + return false; +} + +bool has_erratum_a006261(void) +{ + u32 svr = get_svr(); + u32 soc = SVR_SOC_VER(svr); + + switch (soc) { +#ifdef CONFIG_PPC + case SVR_P1010: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); + case SVR_P2041: + case SVR_P2040: + return IS_SVR_REV(svr, 1, 0) || + IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1); + case SVR_P3041: + return IS_SVR_REV(svr, 1, 0) || + IS_SVR_REV(svr, 1, 1) || + IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1); + case SVR_P5010: + case SVR_P5020: + case SVR_P5021: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); + case SVR_T4240: + case SVR_T4160: + case SVR_T4080: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); + case SVR_T1040: + return IS_SVR_REV(svr, 1, 0); + case SVR_T2080: + case SVR_T2081: + return IS_SVR_REV(svr, 1, 0); + case SVR_P5040: + return IS_SVR_REV(svr, 1, 0); +#endif + } + + return false; +} + +bool has_erratum_a007075(void) +{ + u32 svr = get_svr(); + u32 soc = SVR_SOC_VER(svr); + + switch (soc) { +#ifdef CONFIG_PPC + case SVR_B4860: + case SVR_B4420: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); + case SVR_P1010: + return IS_SVR_REV(svr, 1, 0); + case SVR_P4080: + return IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 3, 0); +#endif + } + return false; +} + +bool has_erratum_a007798(void) +{ +#ifdef CONFIG_PPC + return SVR_SOC_VER(get_svr()) == SVR_T4240 && + IS_SVR_REV(get_svr(), 2, 0); +#endif + return false; +} + +bool has_erratum_a007792(void) +{ + u32 svr = get_svr(); + u32 soc = SVR_SOC_VER(svr); + + switch (soc) { +#ifdef CONFIG_PPC + case SVR_T4240: + case SVR_T4160: + case SVR_T4080: + return IS_SVR_REV(svr, 2, 0); + case SVR_T1024: + case SVR_T1023: + return IS_SVR_REV(svr, 1, 0); + case SVR_T1040: + case SVR_T1042: + case SVR_T1020: + case SVR_T1022: + case SVR_T2080: + case SVR_T2081: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1); +#endif + } + return false; +} + +bool has_erratum_a005697(void) +{ + u32 svr = get_svr(); + u32 soc = SVR_SOC_VER(svr); + + switch (soc) { +#ifdef CONFIG_PPC + case SVR_9131: + case SVR_9132: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1); +#endif + } + return false; +} + +bool has_erratum_a004477(void) +{ + u32 svr = get_svr(); + u32 soc = SVR_SOC_VER(svr); + + switch (soc) { +#ifdef CONFIG_PPC + case SVR_P1010: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); + case SVR_P1022: + case SVR_9131: + case SVR_9132: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1); + case SVR_P2020: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0) || + IS_SVR_REV(svr, 2, 1); + case SVR_B4860: + case SVR_B4420: + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0); + case SVR_P4080: + return IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 3, 0); +#endif + } + + return false; +} + +bool has_erratum_a008751(void) +{ + u32 svr = get_svr(); + u32 soc = SVR_SOC_VER(svr); + + switch (soc) { +#ifdef CONFIG_ARM64 + case SVR_LS2080: + case SVR_LS2085: + return IS_SVR_REV(svr, 1, 0); +#endif + } + return false; +} + +#endif diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index a35a1c7..ae62476 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -52,6 +52,16 @@ config USB_GADGET_DWC2_OTG driver to operate in Peripheral mode. This option requires USB_GADGET to be enabled. +if USB_GADGET_DWC2_OTG + +config USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8 + bool "DesignWare USB2.0 HS OTG controller 8-bit PHY bus width" + help + Set the Designware USB2.0 high-speed OTG controller + PHY interface width to 8 bits, rather than the default (16 bits). + +endif # USB_GADGET_DWC2_OTG + config CI_UDC bool "ChipIdea device controller" select USB_GADGET_DUALSPEED diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c index cb20b00..a23278d 100644 --- a/drivers/usb/gadget/dwc2_udc_otg.c +++ b/drivers/usb/gadget/dwc2_udc_otg.c @@ -415,7 +415,11 @@ static void reconfig_usbd(struct dwc2_udc *dev) |0<<7 /* Ulpi DDR sel*/ |0<<6 /* 0: high speed utmi+, 1: full speed serial*/ |0<<4 /* 0: utmi+, 1:ulpi*/ +#ifdef CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8 + |0<<3 /* phy i/f 0:8bit, 1:16bit*/ +#else |1<<3 /* phy i/f 0:8bit, 1:16bit*/ +#endif |0x7<<0; /* HS/FS Timeout**/ if (dev->pdata->usb_gusbcfg) diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index fa5d584..13aa70d 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -210,6 +210,9 @@ static int ehci_shutdown(struct ehci_ctrl *ctrl) return -EINVAL; cmd = ehci_readl(&ctrl->hcor->or_usbcmd); + /* If not run, directly return */ + if (!(cmd & CMD_RUN)) + return 0; cmd &= ~(CMD_PSE | CMD_ASE); ehci_writel(&ctrl->hcor->or_usbcmd, cmd); ret = handshake(&ctrl->hcor->or_usbsts, STS_ASS | STS_PSS, 0, diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c index 05f09d7..c12a189 100644 --- a/drivers/usb/host/xhci-fsl.c +++ b/drivers/usb/host/xhci-fsl.c @@ -15,6 +15,8 @@ #include <linux/usb/xhci-fsl.h> #include <linux/usb/dwc3.h> #include "xhci.h" +#include <fsl_errata.h> +#include <fsl_usb.h> /* Declare global data pointer */ DECLARE_GLOBAL_DATA_PTR; @@ -27,6 +29,26 @@ __weak int __board_usb_init(int index, enum usb_init_type init) return 0; } +static int erratum_a008751(void) +{ +#if defined(CONFIG_TARGET_LS2080AQDS) || defined(CONFIG_TARGET_LS2080ARDB) + u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE; + writel(SCFG_USB3PRM1CR_INIT, scfg + SCFG_USB3PRM1CR / 4); + return 0; +#endif + return 1; +} + +static void fsl_apply_xhci_errata(void) +{ + int ret; + if (has_erratum_a008751()) { + ret = erratum_a008751(); + if (ret != 0) + puts("Failed to apply erratum a008751\n"); + } +} + static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci) { int ret = 0; @@ -69,6 +91,8 @@ int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor) return ret; } + fsl_apply_xhci_errata(); + ret = fsl_xhci_core_init(ctx); if (ret < 0) { puts("Failed to initialize xhci\n"); |