diff options
author | Hans de Goede <hdegoede@redhat.com> | 2015-04-27 09:44:22 (GMT) |
---|---|---|
committer | Hans de Goede <hdegoede@redhat.com> | 2015-05-04 14:51:54 (GMT) |
commit | 375de01702f4b0b1a27715ca1a18110d6dbfdebe (patch) | |
tree | 76d808f5d177d7debdc68ccaa1ac03d0f19e51ee /drivers | |
parent | 421b32b8808a4d3dc59e84c69fc23b5d62302272 (diff) | |
download | u-boot-375de01702f4b0b1a27715ca1a18110d6dbfdebe.tar.xz |
sunxi: usb: Move setup of host controller clocks to the host controller drivers
The sunxi "usbc" code is mostly about phy setup, but currently also sets up
the host controller clocks, which is something which really belongs in the
host controller drivers, so move it there.
This is a preparation patch for moving the sunxi ehci code to the driver
model and for adding ohci support.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/usb/host/ehci-sunxi.c | 24 | ||||
-rw-r--r-- | drivers/usb/musb-new/sunxi.c | 20 |
2 files changed, 42 insertions, 2 deletions
diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c index eda9f69..41e4d7f 100644 --- a/drivers/usb/host/ehci-sunxi.c +++ b/drivers/usb/host/ehci-sunxi.c @@ -9,19 +9,29 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include <asm/arch/usbc.h> #include <common.h> +#include <asm/arch/clock.h> +#include <asm/arch/usbc.h> +#include <asm/io.h> #include "ehci.h" int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr, struct ehci_hcor **hcor) { - int err; + struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + int ahb_gate_offset, err; err = sunxi_usbc_request_resources(index + 1); if (err) return err; + ahb_gate_offset = index ? AHB_GATE_OFFSET_USB_EHCI1 : + AHB_GATE_OFFSET_USB_EHCI0; + setbits_le32(&ccm->ahb_gate0, 1 << ahb_gate_offset); +#ifdef CONFIG_SUNXI_GEN_SUN6I + setbits_le32(&ccm->ahb_reset0_cfg, 1 << ahb_gate_offset); +#endif + sunxi_usbc_enable(index + 1); sunxi_usbc_vbus_enable(index + 1); @@ -39,8 +49,18 @@ int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr, int ehci_hcd_stop(int index) { + struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + int ahb_gate_offset; + sunxi_usbc_vbus_disable(index + 1); sunxi_usbc_disable(index + 1); + ahb_gate_offset = index ? AHB_GATE_OFFSET_USB_EHCI1 : + AHB_GATE_OFFSET_USB_EHCI0; +#ifdef CONFIG_SUNXI_GEN_SUN6I + clrbits_le32(&ccm->ahb_reset0_cfg, 1 << ahb_gate_offset); +#endif + clrbits_le32(&ccm->ahb_gate0, 1 << ahb_gate_offset); + return sunxi_usbc_free_resources(index + 1); } diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index c9a6a16..e3c6d6a 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -22,6 +22,7 @@ */ #include <common.h> #include <asm/arch/cpu.h> +#include <asm/arch/clock.h> #include <asm/arch/gpio.h> #include <asm/arch/usbc.h> #include <asm-generic/gpio.h> @@ -219,11 +220,24 @@ static void sunxi_musb_enable(struct musb *musb) static void sunxi_musb_disable(struct musb *musb) { + struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + pr_debug("%s():\n", __func__); /* Put the controller back in a pristane state for "usb reset" */ if (musb->is_active) { sunxi_usbc_disable(0); +#ifdef CONFIG_SUNXI_GEN_SUN6I + clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0); +#endif + clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0); + + mdelay(10); + + setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0); +#ifdef CONFIG_SUNXI_GEN_SUN6I + setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0); +#endif sunxi_usbc_enable(0); musb->is_active = 0; } @@ -231,6 +245,7 @@ static void sunxi_musb_disable(struct musb *musb) static int sunxi_musb_init(struct musb *musb) { + struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; int err; pr_debug("%s():\n", __func__); @@ -249,6 +264,11 @@ static int sunxi_musb_init(struct musb *musb) } musb->isr = sunxi_musb_interrupt; + + setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0); +#ifdef CONFIG_SUNXI_GEN_SUN6I + setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0); +#endif sunxi_usbc_enable(0); USBC_ConfigFIFO_Base(); |