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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-08-25 05:52:38 (GMT)
committerMasahiro Yamada <yamada.masahiro@socionext.com>2016-08-28 03:39:51 (GMT)
commit4a89a24e26670921614a83098e5c0692de2be86e (patch)
tree7f7e8314b41614fb1e08e68727ab518a518e8323 /drivers
parent8be12e28394efce2844e0a08e8c6e38e60f36d31 (diff)
downloadu-boot-4a89a24e26670921614a83098e5c0692de2be86e.tar.xz
mmc: uniphier-sd: just return if already set to desired clock rate
With this, we can save unnecessary udelay(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/uniphier-sd.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c
index 40a5c85..701b26f 100644
--- a/drivers/mmc/uniphier-sd.c
+++ b/drivers/mmc/uniphier-sd.c
@@ -571,6 +571,9 @@ static void uniphier_sd_set_clk_rate(struct uniphier_sd_priv *priv,
val = UNIPHIER_SD_CLKCTL_DIV1024;
tmp = readl(priv->regbase + UNIPHIER_SD_CLKCTL);
+ if (tmp & UNIPHIER_SD_CLKCTL_SCLKEN &&
+ (tmp & UNIPHIER_SD_CLKCTL_DIV_MASK) == val)
+ return;
/* stop the clock before changing its rate to avoid a glitch signal */
tmp &= ~UNIPHIER_SD_CLKCTL_SCLKEN;
@@ -582,6 +585,8 @@ static void uniphier_sd_set_clk_rate(struct uniphier_sd_priv *priv,
tmp |= UNIPHIER_SD_CLKCTL_SCLKEN;
writel(tmp, priv->regbase + UNIPHIER_SD_CLKCTL);
+
+ udelay(1000);
}
static int uniphier_sd_set_ios(struct udevice *dev)
@@ -599,8 +604,6 @@ static int uniphier_sd_set_ios(struct udevice *dev)
uniphier_sd_set_ddr_mode(priv, mmc);
uniphier_sd_set_clk_rate(priv, mmc);
- udelay(1000);
-
return 0;
}