arm: rmobile: Add BLANCHE board support

BLANCHE is development board based on R-Car V2H SoC (R8A7792)

This commit supports the following periherals:
- SCIF, Ethernet, QSPI, MMC

Signed-off-by: Masakazu Mochizuki <masakazu.mochizuki.wd@hitachi.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

2 files changed, 20 insertions, 22 deletions

diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c
index dc4c686..e9d99a2 100644
--- a/drivers/mmc/sh_sdhi.c
+++ b/drivers/mmc/sh_sdhi.c
@@ -399,7 +399,6 @@ static void sh_sdhi_get_response(struct sh_sdhi_host *host, struct mmc_cmd *cmd)
 {
 	unsigned short i, j, cnt = 1;
 	unsigned short resp[8];
-	unsigned long *p1, *p2;
 
 	if (cmd->resp_type & MMC_RSP_136) {
 		cnt = 4;
@@ -418,30 +417,29 @@ static void sh_sdhi_get_response(struct sh_sdhi_host *host, struct mmc_cmd *cmd)
 			resp[i] |= (resp[j--] >> 8) & 0x00ff;
 		}
 		resp[0] = (resp[0] << 8) & 0xff00;
-
-		/* SDHI REGISTER SPECIFICATION */
-		p1 = ((unsigned long *)resp) + 3;
-
 	} else {
 		resp[0] = sh_sdhi_readw(host, SDHI_RSP00);
 		resp[1] = sh_sdhi_readw(host, SDHI_RSP01);
-
-		p1 = ((unsigned long *)resp);
 	}
 
-	p2 = (unsigned long *)cmd->response;
-
-	barrier();
-
 #if defined(__BIG_ENDIAN_BITFIELD)
-	for (i = 0; i < cnt; i++) {
-		*p2++ = ((*p1 >> 16) & 0x0000ffff) |
-				((*p1 << 16) & 0xffff0000);
-		p1--;
+	if (cnt == 4) {
+		cmd->response[0] = (resp[6] << 16) | resp[7];
+		cmd->response[1] = (resp[4] << 16) | resp[5];
+		cmd->response[2] = (resp[2] << 16) | resp[3];
+		cmd->response[3] = (resp[0] << 16) | resp[1];
+	} else {
+		cmd->response[0] = (resp[0] << 16) | resp[1];
 	}
 #else
-	for (i = 0; i < cnt; i++)
-		*p2++ = *p1--;
+	if (cnt == 4) {
+		cmd->response[0] = (resp[7] << 16) | resp[6];
+		cmd->response[1] = (resp[5] << 16) | resp[4];
+		cmd->response[2] = (resp[3] << 16) | resp[2];
+		cmd->response[3] = (resp[1] << 16) | resp[0];
+	} else {
+		cmd->response[0] = (resp[1] << 16) | resp[0];
+	}
 #endif /* __BIG_ENDIAN_BITFIELD */
 }
 
diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h
index a95684b..348f544 100644
--- a/drivers/serial/serial_sh.h
+++ b/drivers/serial/serial_sh.h
@@ -225,8 +225,8 @@ struct uart_port {
 # define SCIF_ORER 0x0001		/* Overrun error bit */
 # define SCSCR_INIT(port)	0x38	/* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
 #elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
-	defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794) || \
-	defined(CONFIG_R8A7795)
+	defined(CONFIG_R8A7792) || defined(CONFIG_R8A7793) || \
+	defined(CONFIG_R8A7794) || defined(CONFIG_R8A7795)
 # if defined(CONFIG_SCIF_A)
 #  define SCIF_ORER	0x0200
 # else
@@ -308,7 +308,7 @@ struct uart_port {
 /* SH7763 SCIF2 support */
 # define SCIF2_RFDC_MASK 0x001f
 # define SCIF2_TXROOM_MAX 16
-#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
+#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || defined(CONFIG_R8A7792) || \
 	defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794)
 # define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
 # if defined(CONFIG_SCIF_A)
@@ -566,7 +566,7 @@ SCIF_FNS(SCFCR,  0x18, 16)
 SCIF_FNS(SCFDR,  0x1c, 16)
 SCIF_FNS(SCLSR,  0x24, 16)
 SCIF_FNS(DL,	 0x00,  0) /* dummy */
-#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
+#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || defined(CONFIG_R8A7792) || \
 	defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794)
 /* SCIFA and SCIF register offsets and size */
 SCIx_FNS(SCSMR,  0,  0, 0x00, 16, 0,  0, 0x00, 16, 0,  0)
@@ -762,7 +762,7 @@ static inline int scbrr_calc(struct uart_port *port, int bps, int clk)
 #define SCBRR_VALUE(bps, clk) scbrr_calc(port, bps, clk)
 #elif defined(__H8300H__) || defined(__H8300S__)
 #define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1)
-#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
+#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || defined(CONFIG_R8A7792) || \
 	defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794)
 #define DL_VALUE(bps, clk) (clk / bps / 16) /* External Clock */
  #if defined(CONFIG_SCIF_A)