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authorYork Sun <york.sun@nxp.com>2017-06-06 16:22:40 (GMT)
committerYork Sun <york.sun@nxp.com>2017-06-12 19:18:14 (GMT)
commitef621da7f87a4e6907276595dbb9b6eba8784ddf (patch)
treedf13062cd45938595652d2829c497ba1e61e9667 /drivers
parente02eae6f978017b12261fe273cefae513f84a389 (diff)
downloadu-boot-ef621da7f87a4e6907276595dbb9b6eba8784ddf.tar.xz
net: phy: marvell: Fix init function for m88e1145
Commit a058052c changed the generic phy_reset() to clear all bits in BMCR. This inevitably clears the ANEG bit. m88e1145 requires any change to ANEG bit to be followed by a software reset. This seems to be different from other PHYs. Implement read-modify-write procedure for this PHY init. Signed-off-by: York Sun <york.sun@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/phy/marvell.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 8041922..b7f300e 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -482,7 +482,10 @@ static int m88e1145_config(struct phy_device *phydev)
genphy_config_aneg(phydev);
- phy_reset(phydev);
+ /* soft reset */
+ reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
+ reg |= BMCR_RESET;
+ phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, reg);
return 0;
}