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authorTom Rini <trini@konsulko.com>2016-05-21 00:43:27 (GMT)
committerTom Rini <trini@konsulko.com>2016-05-23 15:51:37 (GMT)
commitd7d000311285e4b8d11e089ca13ea456a01be3b8 (patch)
treed156930b1f4ebf864dd42ec6e43e24045d975c55 /examples/standalone
parentd38fca40c84e6d5f73dfe43cef4c46d42f90aa66 (diff)
parent40ba13c98627055465709acd67872e381b42f928 (diff)
downloadu-boot-d7d000311285e4b8d11e089ca13ea456a01be3b8.tar.xz
Merge branch 'master' of git://git.denx.de/u-boot-mips
Diffstat (limited to 'examples/standalone')
-rw-r--r--examples/standalone/stubs.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c
index 920a0a9..0d62067 100644
--- a/examples/standalone/stubs.c
+++ b/examples/standalone/stubs.c
@@ -65,6 +65,23 @@ gd_t *global_data;
: : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "ip");
#endif
#elif defined(CONFIG_MIPS)
+#ifdef CONFIG_CPU_MIPS64
+/*
+ * k0 ($26) holds the pointer to the global_data; t9 ($25) is a call-
+ * clobbered register that is also used to set gp ($26). Note that the
+ * jr instruction also executes the instruction immediately following
+ * it; however, GCC/mips generates an additional `nop' after each asm
+ * statement
+ */
+#define EXPORT_FUNC(f, a, x, ...) \
+ asm volatile ( \
+" .globl " #x "\n" \
+#x ":\n" \
+" ld $25, %0($26)\n" \
+" ld $25, %1($25)\n" \
+" jr $25\n" \
+ : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "t9");
+#else
/*
* k0 ($26) holds the pointer to the global_data; t9 ($25) is a call-
* clobbered register that is also used to set gp ($26). Note that the
@@ -80,6 +97,7 @@ gd_t *global_data;
" lw $25, %1($25)\n" \
" jr $25\n" \
: : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "t9");
+#endif
#elif defined(CONFIG_NIOS2)
/*
* gp holds the pointer to the global_data, r8 is call-clobbered