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| author | Dave Liu <daveliu@freescale.com> | 2008-10-28 09:53:38 (GMT) |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-12-04 04:44:48 (GMT) |
| commit | 9b0ad1b1c7a15ff674978705c7c52264978dc5d8 (patch) | |
| tree | 5f36c4042cbf9b782a025e446c56d2db8f182db4 /include/configs/MPC8568MDS.h | |
| parent | 2077e348c2a84901022ad95311b47b70361e6daa (diff) | |
| download | u-boot-9b0ad1b1c7a15ff674978705c7c52264978dc5d8.tar.xz | |
85xx: remove the unused ddr_enable_ecc in the board file
The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'include/configs/MPC8568MDS.h')
| -rw-r--r-- | include/configs/MPC8568MDS.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index ab3e6d6..60e6041 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -92,7 +92,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #define CONFIG_DDR_DLL /* possible DLL fix needed */ -#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef |