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author | Priyanka Jain <Priyanka.Jain@freescale.com> | 2011-02-08 07:43:15 (GMT) |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2011-04-04 14:24:42 (GMT) |
commit | 0c871e952e77fe9f3b88d52778d2b5d82da4d884 (patch) | |
tree | 9b68a642ac0646d9260a2488abef330597c2d5c1 /include/configs/P1_P2_RDB.h | |
parent | f098c9c880f08c7b090a4c5bcb924eef1663a32e (diff) | |
download | u-boot-0c871e952e77fe9f3b88d52778d2b5d82da4d884.tar.xz |
powerpc/85xx: Use DDR for RAMBOOT instead of L2 SRAM on p1_p2_rdb
Using DDR as RAMBOOT base instead of L2SRAM for SDCard and SPI Flash
boot loaders because:
- P1_P2_RDB boards have soldered DDR so no need for SPD
- Also P102x has 256K L2 cache size so becomes a limiting factor for
size of image that could be loaded in SRAM mode and would require three
stage boot loader (TPL).
Changes done:
1. CONFIG_SYS_TEXT_BASE to 0x11000000
2. CONFIG_RESET_VECTOR_ADDRESS to 0x1107fffc
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/configs/P1_P2_RDB.h')
-rw-r--r-- | include/configs/P1_P2_RDB.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index a217bcd..53ec56f 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -57,14 +57,14 @@ #ifdef CONFIG_SDCARD #define CONFIG_RAMBOOT_SDCARD 1 -#define CONFIG_SYS_TEXT_BASE 0xf8f80000 -#define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc +#define CONFIG_SYS_TEXT_BASE 0x11000000 +#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc #endif #ifdef CONFIG_SPIFLASH #define CONFIG_RAMBOOT_SPIFLASH 1 -#define CONFIG_SYS_TEXT_BASE 0xf8f80000 -#define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc +#define CONFIG_SYS_TEXT_BASE 0x11000000 +#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc #endif #ifndef CONFIG_SYS_TEXT_BASE |