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| author | Kumar Gala <galak@kernel.crashing.org> | 2011-11-09 15:10:49 (GMT) |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-11-09 15:13:39 (GMT) |
| commit | 8d22ddca3db2577b7f2bf1040972231279288847 (patch) | |
| tree | 55aacddd1daaa8c89cbb14fc3f0a18a183dc72e6 /include/configs/P1_P2_RDB.h | |
| parent | e4382acb1ff1c0686d86f4cac4f2e12f89c534cf (diff) | |
| download | u-boot-8d22ddca3db2577b7f2bf1040972231279288847.tar.xz | |
powerpc/85xx: Fix NAND SPL support
We cause CCSRBAR to be relocated in the SPL phase of NAND boot which
isn't expected and breaks things. Fixing the board config.h to NOT
relocate CCSR during the CONFIG_NAND_SPL phase.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/configs/P1_P2_RDB.h')
| -rw-r--r-- | include/configs/P1_P2_RDB.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index 883d44e..00fa74d 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -151,7 +151,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_CCSRBAR 0xffe00000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR -#if defined(CONFIG_RAMBOOT_NAND) && !defined(CONFIG_NAND_SPL) +#if defined(CONFIG_NAND_SPL) #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif |