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| author | Tom Rini <trini@ti.com> | 2015-02-25 23:14:18 (GMT) |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2015-02-25 23:14:18 (GMT) |
| commit | 1606b34aa50804227806971dbb6b82ea0bf81f55 (patch) | |
| tree | 5c7570722616c6509f6f9126521d0c69c2614f8d /include/configs/ls1021atwr.h | |
| parent | 47d8ae4069b47ce966c0c5e0d8dd041e69ee1f86 (diff) | |
| parent | 94e3c8c4fd7bfe395fa467973cd647551d6d98c7 (diff) | |
| download | u-boot-1606b34aa50804227806971dbb6b82ea0bf81f55.tar.xz | |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Diffstat (limited to 'include/configs/ls1021atwr.h')
| -rw-r--r-- | include/configs/ls1021atwr.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 0a0bb5f..a13876b 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -303,6 +303,30 @@ #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" +#define CONFIG_SYS_PCI_64BIT + +#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF 0x00000000 +#define CONFIG_SYS_PCIE_CFG0_SIZE 0x00001000 /* 4k */ +#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF 0x00001000 +#define CONFIG_SYS_PCIE_CFG1_SIZE 0x00001000 /* 4k */ + +#define CONFIG_SYS_PCIE_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE_IO_PHYS_OFF 0x00010000 +#define CONFIG_SYS_PCIE_IO_SIZE 0x00010000 /* 64k */ + +#define CONFIG_SYS_PCIE_MEM_BUS 0x08000000 +#define CONFIG_SYS_PCIE_MEM_PHYS_OFF 0x04000000 +#define CONFIG_SYS_PCIE_MEM_SIZE 0x08000000 /* 128M */ + +#ifdef CONFIG_PCI +#define CONFIG_NET_MULTI +#define CONFIG_PCI_PNP +#define CONFIG_E1000 +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_CMD_PCI +#define CONFIG_CMD_NET +#endif + #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII |