rockchip: rk3368: Add core start-up code for RK3368

The RK3368 is an octa-core Cortex-A53 SoC from Rockchip.
This adds basic support to chain-load U-Boot from Rockchip's
miniloader.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

1 files changed, 49 insertions, 0 deletions

diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
new file mode 100644
index 0000000..8ebf232
--- /dev/null
+++ b/include/configs/rk3368_common.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2016 Andreas Färber
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_RK3368_COMMON_H
+#define __CONFIG_RK3368_COMMON_H
+
+#define CONFIG_SYS_CACHELINE_SIZE	64
+
+#include <asm/arch/hardware.h>
+#include <linux/sizes.h>
+
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_CBSIZE		1024
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#define CONFIG_SYS_NS16550_MEM32
+
+#define CONFIG_SYS_TEXT_BASE		0x00200000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
+#define CONFIG_SYS_LOAD_ADDR		0x00280000
+
+#define CONFIG_BOUNCE_BUFFER
+
+#ifndef CONFIG_SPL_BUILD
+#define ENV_MEM_LAYOUT_SETTINGS \
+	"scriptaddr=0x00500000\0" \
+	"pxefile_addr_r=0x00600000\0" \
+	"fdt_addr_r=0x5600000\0" \
+	"kernel_addr_r=0x280000\0" \
+	"ramdisk_addr_r=0x5bf0000\0"
+
+#include <config_distro_defaults.h>
+
+#define BOOT_TARGET_DEVICES(func)
+
+#include <config_distro_bootcmd.h>
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	BOOTENV
+
+#endif
+
+#endif