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| author | Dalon Westergreen <dwesterg@gmail.com> | 2017-04-18 15:11:16 (GMT) |
|---|---|---|
| committer | Marek Vasut <marek.vasut+renesas@gmail.com> | 2017-04-25 10:46:44 (GMT) |
| commit | 6bd041f00d5d80761852eae1ecb7879a27f3c289 (patch) | |
| tree | 69ddce8539a156f964f15d6e9e3fcbf81b12f179 /include/configs/socfpga_de10_nano.h | |
| parent | 3c476d841daa491f87c8f07851038afbdf4d90a8 (diff) | |
| download | u-boot-6bd041f00d5d80761852eae1ecb7879a27f3c289.tar.xz | |
arm: socfpga: add cyclone5 based de10-nano board
Add support for the Terasic DE10-Nano board. The board
is based on the DE0-Nano-Soc board but adds a larger FPGA
and an HDMI output.
Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'include/configs/socfpga_de10_nano.h')
| -rw-r--r-- | include/configs/socfpga_de10_nano.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/include/configs/socfpga_de10_nano.h b/include/configs/socfpga_de10_nano.h new file mode 100644 index 0000000..302ec20 --- /dev/null +++ b/include/configs/socfpga_de10_nano.h @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2017, Intel Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __CONFIG_TERASIC_DE10_H__ +#define __CONFIG_TERASIC_DE10_H__ + +#include <asm/arch/base_addr_ac5.h> + +/* U-Boot Commands */ +#define CONFIG_FAT_WRITE +#define CONFIG_HW_WATCHDOG + +/* Memory configurations */ +#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */ + +/* Booting Linux */ +#define CONFIG_LOADADDR 0x01000000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +/* Ethernet on SoC (EMAC) */ +#if defined(CONFIG_CMD_NET) +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9031 +#endif + +#define CONFIG_ENV_IS_IN_MMC + +/* The rest of the configuration is shared */ +#include <configs/socfpga_common.h> + +#endif /* __CONFIG_TERASIC_DE10_H__ */ |