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authorStephen Warren <swarren@nvidia.com>2015-08-07 22:12:43 (GMT)
committerTom Warren <twarren@nvidia.com>2015-08-13 20:06:04 (GMT)
commita89031671215e90f78194db31f68500ec1be3c8a (patch)
tree9891342433964dcb53b808cc04e456b118307d60 /include/configs/tegra210-common.h
parent5a30cee5d05f0ef0470b85f94907022704598253 (diff)
downloadu-boot-a89031671215e90f78194db31f68500ec1be3c8a.tar.xz
ARM: tegra: move kernel_addr_r on T210
The new value is the most likely value where the kernel wants to end up at run-time. Selecting this value as the load address likely avoids the need to copy the kernel image from the actual load address to the desired load address. Note that this isn't guaranteed since the kernel may wish to run at an arbitrary location. In that case, U-Boot will still relocate the image according to its wishes; this change is a performance optimization, not a hard-coding of the final image location. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'include/configs/tegra210-common.h')
-rw-r--r--include/configs/tegra210-common.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h
index d95056c..e6c8152 100644
--- a/include/configs/tegra210-common.h
+++ b/include/configs/tegra210-common.h
@@ -55,7 +55,7 @@
* ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
* for the FDT/DTB to be up to 1M, which is hopefully plenty.
*/
-#define CONFIG_LOADADDR 0x81000000
+#define CONFIG_LOADADDR 0x80080000
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x90000000\0" \
"pxefile_addr_r=0x90100000\0" \