diff options
| author | Tom Rini <trini@konsulko.com> | 2017-05-16 18:46:37 (GMT) |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-06-05 15:02:24 (GMT) |
| commit | 77e99277a20533108101c3024f3c3cfbff0f7e80 (patch) | |
| tree | df2d8d7e5269d14085f9763184a0916abbf27629 /include/configs/ti816x_evm.h | |
| parent | dab2fc2863290a845ad13618a2726931007ff65e (diff) | |
| download | u-boot-77e99277a20533108101c3024f3c3cfbff0f7e80.tar.xz | |
ti816x: Enable NAND
The TI8168-EVM comes with NAND on board. Enable it and move environment
over there.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include/configs/ti816x_evm.h')
| -rw-r--r-- | include/configs/ti816x_evm.h | 60 |
1 files changed, 57 insertions, 3 deletions
diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index f7f6f62..a158485 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -68,8 +68,6 @@ #define CONFIG_SYS_TIMERBASE 0x4802E000 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ -#undef CONFIG_NAND_OMAP_GPMC - /* * NS16550 Configuration */ @@ -86,10 +84,66 @@ #define CONFIG_SERIAL3 #define CONFIG_CONS_INDEX 1 -#define CONFIG_ENV_IS_NOWHERE +/* + * GPMC NAND block. We support 1 device and the physical address to + * access CS0 at is 0x8000000. + */ +#define CONFIG_SYS_NAND_BASE 0x8000000 +#define CONFIG_SYS_MAX_NAND_DEVICE 1 + +/* NAND: SPL related configs */ +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_ECC +#define CONFIG_SPL_NAND_AM33XX_BCH +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE + +/* NAND: device related configs */ +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_BUSWIDTH_16BIT +#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ + CONFIG_SYS_NAND_PAGE_SIZE) +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +/* NAND: driver related configs */ +#define CONFIG_NAND_OMAP_GPMC +#define CONFIG_NAND_OMAP_GPMC_PREFETCH +#define CONFIG_NAND_OMAP_ELM +#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS +#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ + 10, 11, 12, 13, 14, 15, 16, 17, \ + 18, 19, 20, 21, 22, 23, 24, 25, \ + 26, 27, 28, 29, 30, 31, 32, 33, \ + 34, 35, 36, 37, 38, 39, 40, 41, \ + 42, 43, 44, 45, 46, 47, 48, 49, \ + 50, 51, 52, 53, 54, 55, 56, 57, } + +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 14 +#define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW +#define MTDIDS_DEFAULT "nand0=nand.0" +#define MTDPARTS_DEFAULT "mtdparts=nand.0:" \ + "128k(NAND.SPL)," \ + "128k(NAND.SPL.backup1)," \ + "128k(NAND.SPL.backup2)," \ + "128k(NAND.SPL.backup3)," \ + "256k(NAND.u-boot-spl-os)," \ + "1m(NAND.u-boot)," \ + "128k(NAND.u-boot-env)," \ + "128k(NAND.u-boot-env.backup1)," \ + "8m(NAND.kernel)," \ + "-(NAND.file-system)" +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000 +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET 0x001c0000 +#define CONFIG_ENV_OFFSET_REDUND 0x001e0000 +#define CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_NAND_BLOCK_SIZE /* SPL */ /* Defines for SPL */ +#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x40400000 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ |