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author | Poonam Aggrwal <poonam.aggrwal@freescale.com> | 2011-02-07 09:38:29 (GMT) |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2011-04-04 14:24:41 (GMT) |
commit | 09f9ee1695136045f293dacda915d94c2891d4f0 (patch) | |
tree | 547c58c2b882a7915b9d9a1c4ca6f4966572e84b /include/configs | |
parent | c399765d9cb46e8e20739251d5f3151a5608328d (diff) | |
download | u-boot-09f9ee1695136045f293dacda915d94c2891d4f0.tar.xz |
powerpc/85xx: Use BR_PHYS_ADDR macro to setup BRs on P1_P2_RDB
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/configs')
-rw-r--r-- | include/configs/P1_P2_RDB.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index b67f70f..a217bcd 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -264,7 +264,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF) /* NAND flash config */ -#define CONFIG_NAND_BR_PRELIM (CONFIG_SYS_NAND_BASE_PHYS \ +#define CONFIG_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ | BR_PS_8 /* Port Size = 8 bit */ \ | BR_MS_FCM /* MSEL = FCM */ \ @@ -294,7 +294,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_VSC7385_BASE_PHYS CONFIG_SYS_VSC7385_BASE -#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_VSC7385_BASE | BR_PS_8 | BR_V) +#define CONFIG_SYS_BR2_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_VSC7385_BASE) \ + | BR_PS_8 | BR_V) #define CONFIG_SYS_OR2_PRELIM (OR_AM_128KB | OR_GPCM_CSNT | OR_GPCM_XACS | \ OR_GPCM_SCY_15 | OR_GPCM_SETA | OR_GPCM_TRLX | \ OR_GPCM_EHTR | OR_GPCM_EAD) |