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author | Simon Glass <sjg@chromium.org> | 2016-03-12 05:07:31 (GMT) |
---|---|---|
committer | Bin Meng <bmeng.cn@gmail.com> | 2016-03-17 02:27:26 (GMT) |
commit | 2e4fc2b2cc86694b6bf0b39b1109cf3cc3295583 (patch) | |
tree | 30705b18be1213fcb351c69106c7d478aaf7e77e /include/configs | |
parent | 97cb092763714459b9fa569fbe976cb341c4c4c5 (diff) | |
download | u-boot-2e4fc2b2cc86694b6bf0b39b1109cf3cc3295583.tar.xz |
x86: Add a default address for reference code
Add an address which can be used for loading and running the reference code
when needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'include/configs')
-rw-r--r-- | include/configs/x86-chromebook.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index c575dab..057d4be 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -14,6 +14,8 @@ #define CONFIG_MISC_INIT_R #define CONFIG_X86_MRC_ADDR 0xfffa0000 +#define CONFIG_X86_REFCODE_ADDR 0xffea0000 +#define CONFIG_X86_REFCODE_RUN_ADDR 0 #define CONFIG_SCSI_DEV_LIST \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM10_AHCI}, \ |