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authorMasahiro Yamada <yamada.masahiro@socionext.com>2017-01-27 21:53:42 (GMT)
committerMasahiro Yamada <yamada.masahiro@socionext.com>2017-01-29 11:59:08 (GMT)
commit773f5f63dc0db5e39b4782947e761479ecf1bef2 (patch)
tree3fb5235115187333db99fb517b3285b3a3503852 /include/configs
parent4c642e68295604787e59afd7beb52a130728f36d (diff)
downloadu-boot-773f5f63dc0db5e39b4782947e761479ecf1bef2.tar.xz
ARM: uniphier: shrink arrays of DDR-PHY parameters for LD20 SoC
The two arrays ddrphy_{op,ip}_dq_shift_val, occupy more than 3.8 KB memory footprint, which is significant in SPL. There are PHY parameters for 5 boards, but they are actually not board specific, but SoC specific. After all, we just need to have 2 patterns, for LD20 and LD21. Also, the shift values are small enough to become "short" type instead of "int". This change will save about 3 KB memory footprint. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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