Merge commit 'remotes/wd/master'

Conflicts:

	MAKEALL

With any luck, this is the last MAKEALL merge conflict!

8 files changed, 646 insertions, 59 deletions

diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h
index 1a7167b..53261548 100644
--- a/include/configs/IceCube.h
+++ b/include/configs/IceCube.h
@@ -85,7 +85,6 @@
 
 /* USB */
 #define CONFIG_USB_OHCI_NEW
-#define ADD_USB_CMD             CFG_CMD_USB | CFG_CMD_FAT
 #define CONFIG_USB_STORAGE
 #define CFG_OHCI_BE_CONTROLLER
 #undef CFG_USB_OHCI_BOARD_INIT
diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index 8360d8c..3d98500 100644
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -131,8 +131,9 @@
 /* USB */
 #if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
 #define CONFIG_USB_OHCI_NEW
-#define ADD_USB_CMD		CFG_CMD_USB | CFG_CMD_FAT
 #define CONFIG_USB_STORAGE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_USB
 
 #undef CFG_USB_OHCI_BOARD_INIT
 #define CFG_USB_OHCI_CPU_INIT
@@ -140,8 +141,6 @@
 #define CFG_USB_OHCI_SLOT_NAME	"mpc5200"
 #define CFG_USB_OHCI_MAX_ROOT_PORTS	15
 
-#else
-#define ADD_USB_CMD		0
 #endif
 
 #ifndef CONFIG_CAM5200
diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h
index 89564a9..22eac1b 100644
--- a/include/configs/ads5121.h
+++ b/include/configs/ads5121.h
@@ -241,7 +241,6 @@
 #define CONFIG_NET_MULTI
 #define CONFIG_PHY_ADDR		0x1
 #define CONFIG_MII		1	/* MII PHY management		*/
-#define CONFIG_ETHADDR		00:e0:5e:00:e5:14
 
 #if 0
 /*
@@ -267,22 +266,20 @@
 #define CONFIG_LOADS_ECHO	1	/* echo on for serial download */
 #define CFG_LOADS_BAUD_CHANGE	1	/* allow baudrate change */
 
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+
 #if defined(CONFIG_PCI)
-#define  CONFIG_COMMANDS	(CONFIG_CMD_DFL		\
-				| CFG_CMD_PCI		\
-				| CFG_CMD_NET		\
-				| CFG_CMD_PING		\
-				)
-#else
-#define  CONFIG_COMMANDS	(CONFIG_CMD_DFL		\
-				| CFG_CMD_NET		\
-				| CFG_CMD_PING		\
-	  			| CFG_CMD_MII		\
-				| CFG_CMD_I2C)
+#define CONFIG_CMD_PCI
 #endif
 
-#include <cmd_confdefs.h>
-
 /*
  * Watchdog timeout = CFG_WATCHDOG_VALUE * 65536 / IPS clock.
  * For example, when IPS is set to 66MHz and CFG_WATCHDOG_VALUE is set
@@ -299,7 +296,7 @@
 #define CFG_LOAD_ADDR	0x2000000	/* default load address */
 #define CFG_PROMPT	"=> "		/* Monitor Command Prompt */
 
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#ifdef CONFIG_CMD_KGDB
 	#define CFG_CBSIZE	1024		/* Console I/O Buffer Size */
 #else
 	#define CFG_CBSIZE	256		/* Console I/O Buffer Size */
@@ -321,7 +318,7 @@
 /* Cache Configuration */
 #define CFG_DCACHE_SIZE		32768
 #define CFG_CACHELINE_SIZE	32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#ifdef CONFIG_CMD_KGDB
 #define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
 #endif
 
@@ -337,7 +334,7 @@
 #define BOOTFLAG_COLD	0x01	/* Normal Power-On: Boot from FLASH */
 #define BOOTFLAG_WARM	0x02	/* Software reboot */
 
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#ifdef CONFIG_CMD_KGDB
 #define CONFIG_KGDB_BAUDRATE	230400	/* speed of kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use */
 #endif
@@ -348,18 +345,11 @@
 #define CONFIG_ENV_OVERWRITE
 
 #define CONFIG_HOSTNAME		ads5121
-#define CONFIG_ROOTPATH		/nfsroot/rootfs
 #define CONFIG_BOOTFILE		uImage
 
-#define CONFIG_IPADDR		192.168.160.77
-#define CONFIG_SERVERIP		192.168.1.1
-#define CONFIG_GATEWAYIP	192.168.1.1
-#define CONFIG_NETMASK		255.255.0.0
-
 #define CONFIG_LOADADDR		200000	/* default location for tftp and bootm */
 
-//#define CONFIG_BOOTDELAY	6	/* -1 disables auto-boot */
-#define CONFIG_BOOTDELAY	-1
+#define CONFIG_BOOTDELAY	5	/* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS			/* the boot command will set bootargs */
 
 #define CONFIG_BAUDRATE		115200
@@ -383,9 +373,9 @@
 		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
 	"net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;"	\
 		"bootm\0"						\
-	"load=tftp 100000 /tftpboot/ads5121/u-boot.bin\0"		\
-	"update=protect off fff00000 fff3ffff; "			\
-		"era fff00000 fff3ffff; cp.b 100000 fff00000 ${filesize}\0" \
+	"load=tftp 200000 /tftpboot/ads5121/u-boot.bin\0"		\
+	"update=protect off FFF00000 +${filesize};"			\
+		"era FFF00000 +${filesize};cp.b 200000 FFF00000 ${filesize}\0" \
 	"upd=run load;run update\0"					\
 	""
 
diff --git a/include/configs/cm5200.h b/include/configs/cm5200.h
index 7662856..56c0ecb 100644
--- a/include/configs/cm5200.h
+++ b/include/configs/cm5200.h
@@ -35,27 +35,22 @@
 /*
  * Supported commands
  */
-#define CONFIG_COMMANDS	       (CONFIG_CMD_DFL	| \
-				CFG_CMD_ASKENV	| \
-				CFG_CMD_DATE	| \
-				CFG_CMD_DHCP	| \
-				CFG_CMD_ECHO	| \
-				CFG_CMD_I2C	| \
-				CFG_CMD_FLASH	| \
-				CFG_CMD_MII	| \
-				CFG_CMD_NFS	| \
-				CFG_CMD_PING	| \
-				CFG_CMD_DIAG	| \
-				CFG_CMD_REGINFO | \
-				CFG_CMD_SNTP	| \
-				CFG_CMD_BSP	| \
-				CFG_CMD_USB	| \
-				CFG_CMD_FAT	| \
-				CFG_CMD_JFFS2)
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SNTP
+#define CONFIG_CMD_USB
 
 /*
  * Serial console configuration
@@ -344,7 +339,7 @@
  * Cache Configuration
  */
 #define CFG_CACHELINE_SIZE	32	/* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#ifdef CONFIG_CMD_KGDB
 #define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value */
 #endif
 
diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h
new file mode 100644
index 0000000..8ecd059
--- /dev/null
+++ b/include/configs/davinci_dvevm.h
@@ -0,0 +1,214 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+#include <asm/sizes.h>
+
+/*
+ * Define this to make U-Boot skip low level initialization when loaded
+ * by initial bootloader. Not required by NAND U-Boot version but IS
+ * required for a NOR version used to burn the real NOR U-Boot into
+ * NOR Flash. NAND and NOR support for DaVinci chips is mutually exclusive
+ * so it is NOT possible to build a U-Boot with both NAND and NOR routines.
+ * NOR U-Boot is loaded directly from Flash so it must perform all the
+ * low level initialization itself. NAND version is loaded by an initial
+ * bootloader (UBL in TI-ese) that performs such an initialization so it's
+ * skipped in NAND version. The third DaVinci boot mode loads a bootloader
+ * via UART0 and that bootloader in turn loads and runs U-Boot (or whatever)
+ * performing low level init prior to loading. All that means we can NOT use
+ * NAND version to put U-Boot into NOR because it doesn't have NOR support and
+ * we can NOT use NOR version because it performs low level initialization
+ * effectively destroying itself in DDR memory. That's why a separate NOR
+ * version with this define is needed. It is loaded via UART, then one uses
+ * it to somehow download a proper NOR version built WITHOUT this define to
+ * RAM (tftp?) and burn it to NOR Flash. I would be probably able to squeeze
+ * NOR support into the initial bootloader so it won't be needed but DaVinci
+ * static RAM might be too small for this (I have something like 2Kbytes left
+ * as of now, without NOR support) so this might've not happened...
+ *
+#define CONFIG_NOR_UART_BOOT
+ */
+
+/*=======*/
+/* Board */
+/*=======*/
+#define DV_EVM
+#define CFG_NAND_SMALLPAGE
+#define CFG_USE_NOR
+/*===================*/
+/* SoC Configuration */
+/*===================*/
+#define CONFIG_ARM926EJS			/* arm926ejs CPU core */
+#define CONFIG_SYS_CLK_FREQ	297000000	/* Arm Clock frequency */
+#define CFG_TIMERBASE		0x01c21400	/* use timer 0 */
+#define CFG_HZ_CLOCK		27000000	/* Timer Input clock freq */
+#define CFG_HZ			1000
+/*====================================================*/
+/* EEPROM definitions for Atmel 24C256BN SEEPROM chip */
+/* on Sonata/DV_EVM board. No EEPROM on schmoogie.    */
+/*====================================================*/
+#define CFG_I2C_EEPROM_ADDR_LEN		2
+#define CFG_I2C_EEPROM_ADDR		0x50
+#define CFG_EEPROM_PAGE_WRITE_BITS	6
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS	20
+/*=============*/
+/* Memory Info */
+/*=============*/
+#define CFG_MALLOC_LEN		(0x10000 + 128*1024)	/* malloc() len */
+#define CFG_GBL_DATA_SIZE	128		/* reserved for initial data */
+#define CFG_MEMTEST_START	0x80000000	/* memtest start address */
+#define CFG_MEMTEST_END		0x81000000	/* 16MB RAM test */
+#define CONFIG_NR_DRAM_BANKS	1		/* we have 1 bank of DRAM */
+#define CONFIG_STACKSIZE	(256*1024)	/* regular stack */
+#define PHYS_SDRAM_1		0x80000000	/* DDR Start */
+#define PHYS_SDRAM_1_SIZE	0x10000000	/* DDR size 256MB */
+#define DDR_8BANKS				/* 8-bank DDR2 (256MB) */
+/*====================*/
+/* Serial Driver info */
+/*====================*/
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE	4		/* NS16550 register size */
+#define CFG_NS16550_COM1	0x01c20000	/* Base address of UART0 */
+#define CFG_NS16550_CLK		27000000	/* Input clock to NS16550 */
+#define CONFIG_CONS_INDEX	1		/* use UART0 for console */
+#define CONFIG_BAUDRATE		115200		/* Default baud rate */
+#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+/*===================*/
+/* I2C Configuration */
+/*===================*/
+#define CONFIG_HARD_I2C
+#define CONFIG_DRIVER_DAVINCI_I2C
+#define CFG_I2C_SPEED		80000	/* 100Kbps won't work, silicon bug */
+#define CFG_I2C_SLAVE		10	/* Bogus, master-only in U-Boot */
+/*==================================*/
+/* Network & Ethernet Configuration */
+/*==================================*/
+#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_NET_RETRY_COUNT	10
+/*=====================*/
+/* Flash & Environment */
+/*=====================*/
+#ifdef CFG_USE_NAND
+#undef CFG_ENV_IS_IN_FLASH
+#define CFG_NO_FLASH
+#define CFG_ENV_IS_IN_NAND		/* U-Boot env in NAND Flash  */
+#ifdef CFG_NAND_SMALLPAGE
+#define CFG_ENV_SECT_SIZE	512	/* Env sector Size */
+#define CFG_ENV_SIZE		SZ_16K
+#else
+#define CFG_ENV_SECT_SIZE	2048	/* Env sector Size */
+#define CFG_ENV_SIZE		SZ_128K
+#endif
+#define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is loaded by a bootloader */
+#define CONFIG_SKIP_RELOCATE_UBOOT	/* to a proper address, init done */
+#define CFG_NAND_BASE		0x02000000
+#define CFG_NAND_HW_ECC
+#define CFG_MAX_NAND_DEVICE	1	/* Max number of NAND devices */
+#define NAND_MAX_CHIPS		1
+#define CFG_ENV_OFFSET		0x0	/* Block 0--not used by bootcode */
+#define DEF_BOOTM		""
+#elif defined(CFG_USE_NOR)
+#ifdef CONFIG_NOR_UART_BOOT
+#define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is loaded by a bootloader */
+#define CONFIG_SKIP_RELOCATE_UBOOT	/* to a proper address, init done */
+#else
+#undef CONFIG_SKIP_LOWLEVEL_INIT
+#undef CONFIG_SKIP_RELOCATE_UBOOT
+#endif
+#define CFG_ENV_IS_IN_FLASH
+#undef CFG_NO_FLASH
+#define CFG_FLASH_CFI_DRIVER
+#define CFG_FLASH_CFI
+#define CFG_MAX_FLASH_BANKS	1		/* max number of flash banks */
+#define CFG_FLASH_SECT_SZ	0x10000		/* 64KB sect size AMD Flash */
+#define CFG_ENV_OFFSET		(CFG_FLASH_SECT_SZ*3)
+#define PHYS_FLASH_1		0x02000000	/* CS2 Base address 	 */
+#define CFG_FLASH_BASE		PHYS_FLASH_1	/* Flash Base for U-Boot */
+#define PHYS_FLASH_SIZE		0x2000000	/* Flash size 32MB 	 */
+#define CFG_MAX_FLASH_SECT	(PHYS_FLASH_SIZE/CFG_FLASH_SECT_SZ)
+#define CFG_ENV_SECT_SIZE	CFG_FLASH_SECT_SZ	/* Env sector Size */
+#endif
+/*==============================*/
+/* U-Boot general configuration */
+/*==============================*/
+#undef 	CONFIG_USE_IRQ			/* No IRQ/FIQ in U-Boot */
+#define CONFIG_MISC_INIT_R
+#undef CONFIG_BOOTDELAY
+#define CONFIG_BOOTFILE		"uImage"	/* Boot file name */
+#define CFG_PROMPT		"U-Boot > "	/* Monitor Command Prompt */
+#define CFG_CBSIZE		1024		/* Console I/O Buffer Size  */
+#define CFG_PBSIZE		(CFG_CBSIZE+sizeof(CFG_PROMPT)+16)	/* Print buffer sz */
+#define CFG_MAXARGS		16		/* max number of command args */
+#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size */
+#define CFG_LOAD_ADDR		0x80700000	/* default Linux kernel load address */
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_AUTO_COMPLETE		/* Won't work with hush so far, may be later */
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2	"> "
+#define CONFIG_CMDLINE_EDITING
+#define CFG_LONGHELP
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+/*===================*/
+/* Linux Information */
+/*===================*/
+#define LINUX_BOOT_PARAM_ADDR	0x80000100
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_BOOTARGS		"mem=120M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp"
+#define CONFIG_BOOTCOMMAND	"setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot; bootm 0x2050000"
+/*=================*/
+/* U-Boot commands */
+/*=================*/
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_SETGETDCR
+#ifdef CFG_USE_NAND
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+#define CONFIG_CMD_NAND
+#elif defined(CFG_USE_NOR)
+#define CONFIG_CMD_JFFS2
+#else
+#error "Either CFG_USE_NAND or CFG_USE_NOR _MUST_ be defined !!!"
+#endif
+/*=======================*/
+/* KGDB support (if any) */
+/*=======================*/
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_KGDB_BAUDRATE	115200	/* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX	1	/* which serial port to use */
+#endif
+#endif /* __CONFIG_H */
diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h
new file mode 100644
index 0000000..96c9a30
--- /dev/null
+++ b/include/configs/davinci_schmoogie.h
@@ -0,0 +1,157 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+#include <asm/sizes.h>
+
+/*=======*/
+/* Board */
+/*=======*/
+#define SCHMOOGIE
+#define CFG_NAND_LARGEPAGE
+#define CFG_USE_NAND
+/*===================*/
+/* SoC Configuration */
+/*===================*/
+#define CONFIG_ARM926EJS			/* arm926ejs CPU core */
+#define CONFIG_SYS_CLK_FREQ	297000000	/* Arm Clock frequency */
+#define CFG_TIMERBASE		0x01c21400	/* use timer 0 */
+#define CFG_HZ_CLOCK		27000000	/* Timer Input clock freq */
+#define CFG_HZ			1000
+/*=============*/
+/* Memory Info */
+/*=============*/
+#define CFG_MALLOC_LEN		(0x10000 + 256*1024)	/* malloc() len */
+#define CFG_GBL_DATA_SIZE	128		/* reserved for initial data */
+#define CFG_MEMTEST_START	0x80000000	/* memtest start address */
+#define CFG_MEMTEST_END		0x81000000	/* 16MB RAM test */
+#define CONFIG_NR_DRAM_BANKS	1		/* we have 1 bank of DRAM */
+#define CONFIG_STACKSIZE	(256*1024)	/* regular stack */
+#define PHYS_SDRAM_1		0x80000000	/* DDR Start */
+#define PHYS_SDRAM_1_SIZE	0x08000000	/* DDR size 128MB */
+#define DDR_4BANKS				/* 4-bank DDR2 (128MB) */
+/*====================*/
+/* Serial Driver info */
+/*====================*/
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE	4		/* NS16550 register size */
+#define CFG_NS16550_COM1	0x01c20000	/* Base address of UART0 */
+#define CFG_NS16550_CLK		27000000	/* Input clock to NS16550 */
+#define CONFIG_CONS_INDEX	1		/* use UART0 for console */
+#define CONFIG_BAUDRATE		115200		/* Default baud rate */
+#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+/*===================*/
+/* I2C Configuration */
+/*===================*/
+#define CONFIG_HARD_I2C
+#define CONFIG_DRIVER_DAVINCI_I2C
+#define CFG_I2C_SPEED		80000	/* 100Kbps won't work, silicon bug */
+#define CFG_I2C_SLAVE		10	/* Bogus, master-only in U-Boot */
+/*==================================*/
+/* Network & Ethernet Configuration */
+/*==================================*/
+#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_NET_RETRY_COUNT	10
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+/*=====================*/
+/* Flash & Environment */
+/*=====================*/
+#undef CFG_ENV_IS_IN_FLASH
+#define CFG_NO_FLASH
+#define CFG_ENV_IS_IN_NAND		/* U-Boot env in NAND Flash  */
+#define CFG_ENV_SECT_SIZE	2048	/* Env sector Size */
+#define CFG_ENV_SIZE		SZ_128K
+#define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is loaded by a bootloader */
+#define CONFIG_SKIP_RELOCATE_UBOOT	/* to a proper address, init done */
+#define CFG_NAND_BASE		0x02000000
+#define CFG_NAND_HW_ECC
+#define CFG_MAX_NAND_DEVICE	1	/* Max number of NAND devices */
+#define NAND_MAX_CHIPS		1
+#define CFG_ENV_OFFSET		0x0	/* Block 0--not used by bootcode */
+/*=====================*/
+/* Board related stuff */
+/*=====================*/
+#define CONFIG_RTC_DS1307		/* RTC chip on SCHMOOGIE */
+#define CFG_I2C_RTC_ADDR	0x6f	/* RTC chip I2C address */
+#define CONFIG_HAS_UID
+#define CONFIG_UID_DS28CM00		/* Unique ID on SCHMOOGIE */
+#define CFG_UID_ADDR		0x50	/* UID chip I2C address */
+/*==============================*/
+/* U-Boot general configuration */
+/*==============================*/
+#undef 	CONFIG_USE_IRQ			/* No IRQ/FIQ in U-Boot */
+#define CONFIG_MISC_INIT_R
+#undef CONFIG_BOOTDELAY
+#define CONFIG_BOOTFILE		"uImage"	/* Boot file name */
+#define CFG_PROMPT		"U-Boot > "	/* Monitor Command Prompt */
+#define CFG_CBSIZE		1024		/* Console I/O Buffer Size  */
+#define CFG_PBSIZE		(CFG_CBSIZE+sizeof(CFG_PROMPT)+16)	/* Print buffer sz */
+#define CFG_MAXARGS		16		/* max number of command args */
+#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size */
+#define CFG_LOAD_ADDR		0x80700000	/* default Linux kernel load address */
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_AUTO_COMPLETE		/* Won't work with hush so far, may be later */
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2	"> "
+#define CONFIG_CMDLINE_EDITING
+#define CFG_LONGHELP
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+/*===================*/
+/* Linux Information */
+/*===================*/
+#define LINUX_BOOT_PARAM_ADDR	0x80000100
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_BOOTARGS		"mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp"
+#define CONFIG_BOOTCOMMAND	"setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot"
+/*=================*/
+/* U-Boot commands */
+/*=================*/
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_NAND
+#undef CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_SETGETDCR
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+/*=======================*/
+/* KGDB support (if any) */
+/*=======================*/
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_KGDB_BAUDRATE	115200	/* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX	1	/* which serial port to use */
+#endif
+#endif /* __CONFIG_H */
diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h
new file mode 100644
index 0000000..de8c4fa
--- /dev/null
+++ b/include/configs/davinci_sonata.h
@@ -0,0 +1,209 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+#include <asm/sizes.h>
+
+/*
+ * Define this to make U-Boot skip low level initialization when loaded
+ * by initial bootloader. Not required by NAND U-Boot version but IS
+ * required for a NOR version used to burn the real NOR U-Boot into
+ * NOR Flash. NAND and NOR support for DaVinci chips is mutually exclusive
+ * so it is NOT possible to build a U-Boot with both NAND and NOR routines.
+ * NOR U-Boot is loaded directly from Flash so it must perform all the
+ * low level initialization itself. NAND version is loaded by an initial
+ * bootloader (UBL in TI-ese) that performs such an initialization so it's
+ * skipped in NAND version. The third DaVinci boot mode loads a bootloader
+ * via UART0 and that bootloader in turn loads and runs U-Boot (or whatever)
+ * performing low level init prior to loading. All that means we can NOT use
+ * NAND version to put U-Boot into NOR because it doesn't have NOR support and
+ * we can NOT use NOR version because it performs low level initialization
+ * effectively destroying itself in DDR memory. That's why a separate NOR
+ * version with this define is needed. It is loaded via UART, then one uses
+ * it to somehow download a proper NOR version built WITHOUT this define to
+ * RAM (tftp?) and burn it to NOR Flash. I would be probably able to squeeze
+ * NOR support into the initial bootloader so it won't be needed but DaVinci
+ * static RAM might be too small for this (I have something like 2Kbytes left
+ * as of now, without NOR support) so this might've not happened...
+ *
+#define CONFIG_NOR_UART_BOOT
+ */
+
+/*=======*/
+/* Board */
+/*=======*/
+#define SONATA_BOARD
+#define CFG_NAND_SMALLPAGE
+#define CFG_USE_NOR
+/*===================*/
+/* SoC Configuration */
+/*===================*/
+#define CONFIG_ARM926EJS			/* arm926ejs CPU core */
+#define CONFIG_SYS_CLK_FREQ	297000000	/* Arm Clock frequency */
+#define CFG_TIMERBASE		0x01c21400	/* use timer 0 */
+#define CFG_HZ_CLOCK		27000000	/* Timer Input clock freq */
+#define CFG_HZ			1000
+/*====================================================*/
+/* EEPROM definitions for Atmel 24C256BN SEEPROM chip */
+/* on Sonata/DV_EVM board. No EEPROM on schmoogie.    */
+/*====================================================*/
+#define CFG_I2C_EEPROM_ADDR_LEN		2
+#define CFG_I2C_EEPROM_ADDR		0x50
+#define CFG_EEPROM_PAGE_WRITE_BITS	6
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS	20
+/*=============*/
+/* Memory Info */
+/*=============*/
+#define CFG_MALLOC_LEN		(0x10000 + 128*1024)	/* malloc() len */
+#define CFG_GBL_DATA_SIZE	128		/* reserved for initial data */
+#define CFG_MEMTEST_START	0x80000000	/* memtest start address */
+#define CFG_MEMTEST_END		0x81000000	/* 16MB RAM test */
+#define CONFIG_NR_DRAM_BANKS	1		/* we have 1 bank of DRAM */
+#define CONFIG_STACKSIZE	(256*1024)	/* regular stack */
+#define PHYS_SDRAM_1		0x80000000	/* DDR Start */
+#define PHYS_SDRAM_1_SIZE	0x08000000	/* DDR size 128MB */
+#define DDR_4BANKS				/* 4-bank DDR2 (128MB) */
+/*====================*/
+/* Serial Driver info */
+/*====================*/
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE	4		/* NS16550 register size */
+#define CFG_NS16550_COM1	0x01c20000	/* Base address of UART0 */
+#define CFG_NS16550_CLK		27000000	/* Input clock to NS16550 */
+#define CONFIG_CONS_INDEX	1		/* use UART0 for console */
+#define CONFIG_BAUDRATE		115200		/* Default baud rate */
+#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+/*===================*/
+/* I2C Configuration */
+/*===================*/
+#define CONFIG_HARD_I2C
+#define CONFIG_DRIVER_DAVINCI_I2C
+#define CFG_I2C_SPEED		80000	/* 100Kbps won't work, silicon bug */
+#define CFG_I2C_SLAVE		10	/* Bogus, master-only in U-Boot */
+/*==================================*/
+/* Network & Ethernet Configuration */
+/*==================================*/
+#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_NET_RETRY_COUNT	10
+/*=====================*/
+/* Flash & Environment */
+/*=====================*/
+#ifdef CFG_USE_NAND
+#undef CFG_ENV_IS_IN_FLASH
+#define CFG_NO_FLASH
+#define CFG_ENV_IS_IN_NAND		/* U-Boot env in NAND Flash  */
+#define CFG_ENV_SECT_SIZE	512	/* Env sector Size */
+#define CFG_ENV_SIZE		SZ_16K
+#define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is loaded by a bootloader */
+#define CONFIG_SKIP_RELOCATE_UBOOT	/* to a proper address, init done */
+#define CFG_NAND_BASE		0x02000000
+#define CFG_NAND_HW_ECC
+#define CFG_MAX_NAND_DEVICE	1	/* Max number of NAND devices */
+#define NAND_MAX_CHIPS		1
+#define CFG_ENV_OFFSET		0x0	/* Block 0--not used by bootcode */
+#define DEF_BOOTM		""
+#elif defined(CFG_USE_NOR)
+#ifdef CONFIG_NOR_UART_BOOT
+#define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is loaded by a bootloader */
+#define CONFIG_SKIP_RELOCATE_UBOOT	/* to a proper address, init done */
+#else
+#undef CONFIG_SKIP_LOWLEVEL_INIT
+#undef CONFIG_SKIP_RELOCATE_UBOOT
+#endif
+#define CFG_ENV_IS_IN_FLASH
+#undef CFG_NO_FLASH
+#define CFG_FLASH_CFI_DRIVER
+#define CFG_FLASH_CFI
+#define CFG_MAX_FLASH_BANKS	1		/* max number of flash banks */
+#define CFG_FLASH_SECT_SZ	0x20000		/* 128KB sect size AMD Flash */
+#define CFG_ENV_OFFSET		(CFG_FLASH_SECT_SZ*2)
+#define PHYS_FLASH_1		0x02000000	/* CS2 Base address 	 */
+#define CFG_FLASH_BASE		PHYS_FLASH_1	/* Flash Base for U-Boot */
+#define PHYS_FLASH_SIZE		0x2000000	/* Flash size 32MB 	 */
+#define CFG_MAX_FLASH_SECT	(PHYS_FLASH_SIZE/CFG_FLASH_SECT_SZ)
+#define CFG_ENV_SECT_SIZE	CFG_FLASH_SECT_SZ	/* Env sector Size */
+#endif
+/*==============================*/
+/* U-Boot general configuration */
+/*==============================*/
+#undef 	CONFIG_USE_IRQ			/* No IRQ/FIQ in U-Boot */
+#define CONFIG_MISC_INIT_R
+#undef CONFIG_BOOTDELAY
+#define CONFIG_BOOTFILE		"uImage"	/* Boot file name */
+#define CFG_PROMPT		"U-Boot > "	/* Monitor Command Prompt */
+#define CFG_CBSIZE		1024		/* Console I/O Buffer Size  */
+#define CFG_PBSIZE		(CFG_CBSIZE+sizeof(CFG_PROMPT)+16)	/* Print buffer sz */
+#define CFG_MAXARGS		16		/* max number of command args */
+#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size */
+#define CFG_LOAD_ADDR		0x80700000	/* default Linux kernel load address */
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_AUTO_COMPLETE		/* Won't work with hush so far, may be later */
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2	"> "
+#define CONFIG_CMDLINE_EDITING
+#define CFG_LONGHELP
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+/*===================*/
+/* Linux Information */
+/*===================*/
+#define LINUX_BOOT_PARAM_ADDR	0x80000100
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_BOOTARGS		"mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp"
+#define CONFIG_BOOTCOMMAND	"setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot; bootm 0x2060000"
+/*=================*/
+/* U-Boot commands */
+/*=================*/
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_SETGETDCR
+#ifdef CFG_USE_NAND
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+#define CONFIG_CMD_NAND
+#elif defined(CFG_USE_NOR)
+#define CONFIG_CMD_JFFS2
+#else
+#error "Either CFG_USE_NAND or CFG_USE_NOR _MUST_ be defined !!!"
+#endif
+/*=======================*/
+/* KGDB support (if any) */
+/*=======================*/
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_KGDB_BAUDRATE	115200	/* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX	1	/* which serial port to use */
+#endif
+#endif /* __CONFIG_H */
diff --git a/include/configs/mcc200.h b/include/configs/mcc200.h
index 744f551..cc2dbcd 100644
--- a/include/configs/mcc200.h
+++ b/include/configs/mcc200.h
@@ -111,11 +111,13 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_CMD_USB
 
+#undef	CONFIG_CMD_NET
+
 
 /*
  * Autobooting
  */
-#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */
+#define CONFIG_BOOTDELAY	1	/* autoboot after 1 second */
 
 #define CONFIG_PREBOOT	"echo;"	\
 	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
@@ -131,20 +133,30 @@
 # define CFG__LINUX_CONSOLE	"ttyS0"
 #else
 # define CFG__BOARDNAME		"mcc200"
-# define CFG__LINUX_CONSOLE	"ttyEU7"
+# define CFG__LINUX_CONSOLE	"ttyEU5"
 #endif
 
+/* Network */
+#define CONFIG_ETHADDR	00:17:17:ff:00:00
+#define CONFIG_IPADDR	10.76.9.29
+#define CONFIG_SERVERIP	10.76.9.1
+
+#include <version.h> /* For U-Boot version */
+
 #define CONFIG_EXTRA_ENV_SETTINGS					\
+	"ubootver=" U_BOOT_VERSION "\0"					\
 	"netdev=eth0\0"							\
 	"hostname=" CFG__BOARDNAME "\0"					\
 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
 		"nfsroot=${serverip}:${rootpath}\0"			\
-	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
+	"ramargs=setenv bootargs root=/dev/mtdblock2 "			\
+		"rootfstype=cramfs\0"					\
 	"addip=setenv bootargs ${bootargs} "				\
 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
 		":${hostname}:${netdev}:off panic=1\0"			\
 	"addcons=setenv bootargs ${bootargs} "				\
-		"console=${console},${baudrate}\0"			\
+		"console=${console},${baudrate} "		\
+		"ubootver=${ubootver} board=${board}\0"	\
 	"flash_nfs=run nfsargs addip addcons;"				\
 		"bootm ${kernel_addr}\0"				\
 	"flash_self=run ramargs addip addcons;"				\
@@ -156,6 +168,7 @@
 	"bootfile=/tftpboot/" CFG__BOARDNAME "/uImage\0"		\
 	"load=tftp 200000 /tftpboot/" CFG__BOARDNAME "/u-boot.bin\0"	\
 	"text_base=" MK_STR(TEXT_BASE) "\0"				\
+	"kernel_addr=0xFC0C0000\0"					\
 	"update=protect off ${text_base} +${filesize};"			\
 		"era ${text_base} +${filesize};"			\
 		"cp.b 200000 ${text_base} ${filesize}\0"		\
@@ -256,7 +269,7 @@
 /*
  * Ethernet configuration
  */
-#define CONFIG_MPC5xxx_FEC	1
+/*#define CONFIG_MPC5xxx_FEC	1*/
 /*
  * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
  */
@@ -337,6 +350,13 @@
 #define CFG_CS1_SIZE		0x00001000
 #define CFG_CS1_CFG		0x1d300
 
+/* Leica - build revision resistors */
+/*
+#define CFG_CS3_START		0x80020000
+#define CFG_CS3_SIZE		0x00000004
+#define CFG_CS3_CFG		0x1d300
+*/
+
 /*
  *  Select one of quarts as a default
  * console. If undefined - PSC console
@@ -392,4 +412,8 @@
 #define CONFIG_USB_CLOCK	0x0001BBBB
 #define CONFIG_USB_CONFIG	0x00005000
 
+#define CONFIG_AUTOBOOT_KEYED		/* use key strings to stop autoboot	*/
+#define CONFIG_AUTOBOOT_STOP_STR	"432"
+#define CONFIG_SILENT_CONSOLE	1
+
 #endif /* __CONFIG_H */