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author | Tom Rini <trini@konsulko.com> | 2017-05-23 20:22:03 (GMT) |
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committer | Tom Rini <trini@konsulko.com> | 2017-05-23 20:22:03 (GMT) |
commit | be62fbf376261ab3a4ed5db3bf54d5df9e216d9f (patch) | |
tree | 9d629481313869cb7c2238faf4b5c24f25bf2fe5 /include/configs | |
parent | 4c78028737c3185f49f5691183aeac3478b5f699 (diff) | |
parent | 16071b1ba1ef0c938718d1544bb78937a896a4c1 (diff) | |
download | u-boot-be62fbf376261ab3a4ed5db3bf54d5df9e216d9f.tar.xz |
Merge branch 'rmobile' of git://git.denx.de/u-boot-sh
Diffstat (limited to 'include/configs')
-rw-r--r-- | include/configs/rcar-gen3-common.h | 37 | ||||
-rw-r--r-- | include/configs/salvator-x.h | 42 |
2 files changed, 67 insertions, 12 deletions
diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 056aea3..e73bc61 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -2,7 +2,7 @@ * include/configs/rcar-gen3-common.h * This file is R-Car Gen3 common configuration file. * - * Copyright (C) 2015 Renesas Electronics Corporation + * Copyright (C) 2015-2017 Renesas Electronics Corporation * * SPDX-License-Identifier: GPL-2.0+ */ @@ -17,7 +17,6 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_EXT4 #define CONFIG_CMD_EXT4_WRITE -#define CONFIG_CMD_FDT #define CONFIG_REMAKE_ELF @@ -34,7 +33,6 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG #define CONFIG_CMDLINE_EDITING -#define CONFIG_OF_LIBFDT #undef CONFIG_SHOW_BOOT_PROGRESS @@ -52,13 +50,34 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400 } /* MEMORY */ -#define CONFIG_SYS_TEXT_BASE 0x49000000 +#define CONFIG_SYS_TEXT_BASE 0x50000000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7fff0) -#define CONFIG_SYS_SDRAM_BASE (0x48000000) -#define CONFIG_SYS_SDRAM_SIZE (1024u * 1024 * 1024 - 0x08000000) -#define CONFIG_SYS_LOAD_ADDR (0x48080000) -#define CONFIG_NR_DRAM_BANKS 1 +#define DRAM_RSV_SIZE 0x08000000 +#if defined(CONFIG_R8A7795) +#define CONFIG_NR_DRAM_BANKS 4 +#define PHYS_SDRAM_1 (0x40000000 + DRAM_RSV_SIZE) +#define PHYS_SDRAM_1_SIZE (0x40000000u - DRAM_RSV_SIZE) +#define PHYS_SDRAM_2 0x500000000 +#define PHYS_SDRAM_2_SIZE 0x40000000u +#define PHYS_SDRAM_3 0x600000000 +#define PHYS_SDRAM_3_SIZE 0x40000000u +#define PHYS_SDRAM_4 0x700000000 +#define PHYS_SDRAM_4_SIZE 0x40000000u +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE +#elif defined(CONFIG_R8A7796) +#define CONFIG_NR_DRAM_BANKS 2 +#define PHYS_SDRAM_1 (0x40000000 + DRAM_RSV_SIZE) +#define PHYS_SDRAM_1_SIZE (0x80000000u - DRAM_RSV_SIZE) +#define PHYS_SDRAM_2 0x0600000000 +#define PHYS_SDRAM_2_SIZE 0x80000000u +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE +#endif +#define CONFIG_SYS_LOAD_ADDR 0x48080000 +#define CONFIG_VERY_BIG_RAM +#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_SDRAM_SIZE #define CONFIG_SYS_MONITOR_BASE 0x00000000 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) @@ -81,7 +100,7 @@ #define CONFIG_BOOTCOMMAND \ "tftp 0x48080000 Image; " \ - "tftp 0x48000000 Image-r8a7795-salvator-x.dtb; " \ + "tftp 0x48000000 Image-"CONFIG_DEFAULT_FDT_FILE"; " \ "booti 0x48080000 - 0x48000000" #endif /* __RCAR_GEN3_COMMON_H */ diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h index 81a7226..0ac3900 100644 --- a/include/configs/salvator-x.h +++ b/include/configs/salvator-x.h @@ -20,21 +20,27 @@ #define CONFIG_SCIF_CONSOLE #define CONFIG_CONS_SCIF2 #define CONFIG_CONS_INDEX 2 -#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ +#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_S3D4_CLK_FREQ /* [A] Hyper Flash */ /* use to RPC(SPI Multi I/O Bus Controller) */ -#define CONFIG_ENV_IS_NOWHERE + +/* Ethernet RAVB */ +#define CONFIG_NET_MULTI +#define CONFIG_PHY_MICREL +#define CONFIG_BITBANGMII +#define CONFIG_BITBANGMII_MULTI /* Board Clock */ /* XTAL_CLK : 33.33MHz */ #define RCAR_XTAL_CLK 33333333u #define CONFIG_SYS_CLK_FREQ RCAR_XTAL_CLK /* ch0to2 CPclk, ch3to11 S3D2_PEREclk, ch12to14 S3D2_RTclk */ -/* CPclk 16.66MHz, S3D2 133.33MHz */ +/* CPclk 16.66MHz, S3D2 133.33MHz , S3D4 66.66MHz */ #define CONFIG_CP_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 192 / 2) #define CONFIG_S3D2_CLK_FREQ (266666666u/2) +#define CONFIG_S3D4_CLK_FREQ (266666666u/4) /* Generic Timer Definitions (use in assembler source) */ #define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ @@ -44,9 +50,39 @@ #define GICD_BASE 0xF1010000 #define GICC_BASE 0xF1020000 +/* i2c */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SH +#define CONFIG_SYS_I2C_SLAVE 0x60 +#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 1 +#define CONFIG_SYS_I2C_SH_SPEED0 400000 +#define CONFIG_SH_I2C_DATA_HIGH 4 +#define CONFIG_SH_I2C_DATA_LOW 5 +#define CONFIG_SH_I2C_CLOCK 10000000 + +#define CONFIG_SYS_I2C_POWERIC_ADDR 0x30 + +/* USB */ +#ifdef CONFIG_R8A7795 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 +#else +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#endif + +/* SDHI */ +#define CONFIG_SH_SDHI_FREQ 200000000 + +/* Environment in eMMC, at the end of 2nd "boot sector" */ +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) +#define CONFIG_SYS_MMC_ENV_DEV 1 +#define CONFIG_SYS_MMC_ENV_PART 2 + /* Module stop status bits */ /* MFIS, SCIF1 */ #define CONFIG_SMSTP2_ENA 0x00002040 +/* SCIF2 */ +#define CONFIG_SMSTP3_ENA 0x00000400 /* INTC-AP, IRQC */ #define CONFIG_SMSTP4_ENA 0x00000180 |