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author | Santan Kumar <santan.kumar@nxp.com> | 2017-05-05 10:12:28 (GMT) |
---|---|---|
committer | York Sun <york.sun@nxp.com> | 2017-06-02 02:57:07 (GMT) |
commit | faed6bde11e11156fd8ca0f60edebcfb10b5a7ff (patch) | |
tree | c58595b19b06ed8bce35717e141052da3fed6ba4 /include/configs | |
parent | 5aa03ddd7ff67dce143a5ea5dbaa85e6aaaab23f (diff) | |
download | u-boot-faed6bde11e11156fd8ca0f60edebcfb10b5a7ff.tar.xz |
armv8: ls2080a: Reorganise NAND_BOOT code in config flag
Add CONFIG_NAND_BOOT config flag to organise
NAND_BOOT specific code in config flag like
-nand-boot specfic errata errata_rcw_src()
-CONFIG_SYS_NAND_U_BOOT_DST,etc
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include/configs')
-rw-r--r-- | include/configs/ls2080a_common.h | 2 | ||||
-rw-r--r-- | include/configs/ls2080aqds.h | 4 |
2 files changed, 5 insertions, 1 deletions
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 3706b1a..43c5fef 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -233,8 +233,10 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TEXT_BASE 0x1800a000 +#ifdef CONFIG_NAND_BOOT #define CONFIG_SYS_NAND_U_BOOT_DST 0x80400000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST +#endif #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 #define CONFIG_SYS_SPL_MALLOC_START 0x80200000 #define CONFIG_SYS_MONITOR_LEN (640 * 1024) diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index d0b0aa9..e6ebec5 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -198,7 +198,8 @@ unsigned long get_board_ddr_clk(void); FTIM2_GPCM_TWP(0x3E)) #define CONFIG_SYS_CS3_FTIM3 0x0 -#if defined(CONFIG_SPL) && defined(CONFIG_NAND) +#if defined(CONFIG_SPL) +#if defined(CONFIG_NAND_BOOT) #define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT #define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR0_CSPR_EARLY #define CONFIG_SYS_CSPR1_FINAL CONFIG_SYS_NOR0_CSPR @@ -234,6 +235,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_SYS_NAND_U_BOOT_OFFS (256 * 1024) #define CONFIG_SYS_NAND_U_BOOT_SIZE (640 * 1024) +#endif #else #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY |