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| author | Tom Rini <trini@konsulko.com> | 2016-07-06 19:55:36 (GMT) |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-07-06 19:55:36 (GMT) |
| commit | 99b8275797b9f4155ee65ec272629ae857d6a8bb (patch) | |
| tree | 2fb36dd20668e626f03240bb4c2b2639e2f757a1 /include/fdtdec.h | |
| parent | 246fa47840f2b9aecc7308f140680dd00545c6a9 (diff) | |
| parent | 703aaf76c2c06109fc36266767b2d1dcfce6f3ba (diff) | |
| download | u-boot-99b8275797b9f4155ee65ec272629ae857d6a8bb.tar.xz | |
Merge branch 'master' of git://git.denx.de/u-boot-tegra
Diffstat (limited to 'include/fdtdec.h')
| -rw-r--r-- | include/fdtdec.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/include/fdtdec.h b/include/fdtdec.h index 54e3d81..05d70c4 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -119,10 +119,7 @@ enum fdt_compat_id { COMPAT_NVIDIA_TEGRA20_EMC, /* Tegra20 memory controller */ COMPAT_NVIDIA_TEGRA20_EMC_TABLE, /* Tegra20 memory timing table */ COMPAT_NVIDIA_TEGRA20_NAND, /* Tegra2 NAND controller */ - COMPAT_NVIDIA_TEGRA20_PWM, /* Tegra 2 PWM controller */ - COMPAT_NVIDIA_TEGRA124_SOR, /* Tegra 124 Serial Output Resource */ COMPAT_NVIDIA_TEGRA124_PMC, /* Tegra 124 power mgmt controller */ - COMPAT_NVIDIA_TEGRA20_DC, /* Tegra 2 Display controller */ COMPAT_NVIDIA_TEGRA186_SDMMC, /* Tegra186 SDMMC controller */ COMPAT_NVIDIA_TEGRA210_SDMMC, /* Tegra210 SDMMC controller */ COMPAT_NVIDIA_TEGRA124_SDMMC, /* Tegra124 SDMMC controller */ @@ -146,7 +143,6 @@ enum fdt_compat_id { COMPAT_SAMSUNG_EXYNOS5_DP, /* Exynos Display port controller */ COMPAT_SAMSUNG_EXYNOS_DWMMC, /* Exynos DWMMC controller */ COMPAT_SAMSUNG_EXYNOS_MMC, /* Exynos MMC controller */ - COMPAT_SAMSUNG_EXYNOS_SERIAL, /* Exynos UART */ COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */ COMPAT_GENERIC_SPI_FLASH, /* Generic SPI Flash chip */ COMPAT_MAXIM_98095_CODEC, /* MAX98095 Codec */ |