diff options
| author | WingMan Kwok <w-kwok2@ti.com> | 2014-09-05 19:26:23 (GMT) |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-10-23 15:27:04 (GMT) |
| commit | bc0e8d7c5d189c1566a73affad0087ccbe511bc9 (patch) | |
| tree | b1f734642d85a6bc024a005abc69de0101ab9ed2 /include/linux | |
| parent | 9ea9021ac466f5ccc8b6238cbce37428bb58f887 (diff) | |
| download | u-boot-bc0e8d7c5d189c1566a73affad0087ccbe511bc9.tar.xz | |
keystone: usb: add support of usb xhci
Add support of usb xhci. xHCI controls all USB speeds of the Host
mode, that is, the SS through the SS PHY, as well as the HS, FS, and
LS through the USB2 PHY. xHCI replaces and supersedes all previous
host HCIs (HS-only EHCI, FS/LS OHCI and UHCI), and is therefore not
backwards compatible with any of them. The USB3SS’s USB Controller is
fully compliant with xHC.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/usb/dwc3.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/include/linux/usb/dwc3.h b/include/linux/usb/dwc3.h index 97d179a..7edc760 100644 --- a/include/linux/usb/dwc3.h +++ b/include/linux/usb/dwc3.h @@ -41,7 +41,8 @@ #define DWC3_REG_OFFSET 0xC100 struct g_event_buffer { - u64 g_evntadr; + u32 g_evntadrlo; + u32 g_evntadrhi; u32 g_evntsiz; u32 g_evntcount; }; @@ -185,4 +186,9 @@ struct dwc3 { /* offset: 0xC100 */ #define DWC3_GTXFIFOSIZ_TXFDEF(n) ((n) & 0xffff) #define DWC3_GTXFIFOSIZ_TXFSTADDR(n) ((n) & 0xffff0000) +/* Device Control Register */ +#define DWC3_DCTL_RUN_STOP (1 << 31) +#define DWC3_DCTL_CSFTRST (1 << 30) +#define DWC3_DCTL_LSFTRST (1 << 29) + #endif /* __DWC3_H_ */ |