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author | Tom Rini <trini@konsulko.com> | 2015-07-15 14:41:20 (GMT) |
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committer | Tom Rini <trini@konsulko.com> | 2015-07-15 14:41:20 (GMT) |
commit | 605e15db2b54302364a2528d3c6604fbc57be846 (patch) | |
tree | 1a1e344964bff1719939183124d66a71e7ca7731 /include/pci.h | |
parent | 4905dfc65d9a17083727865302d2cf633c15c911 (diff) | |
parent | f110da9984c0aa0aba9e1c4178b67b7abecf7e8d (diff) | |
download | u-boot-605e15db2b54302364a2528d3c6604fbc57be846.tar.xz |
Merge git://git.denx.de/u-boot-x86
Diffstat (limited to 'include/pci.h')
-rw-r--r-- | include/pci.h | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/include/pci.h b/include/pci.h index 07b1e9a..542e68b 100644 --- a/include/pci.h +++ b/include/pci.h @@ -513,6 +513,16 @@ struct pci_controller { int indirect_type; + /* + * TODO(sjg@chromium.org): With driver model we use struct + * pci_controller for both the controller and any bridge devices + * attached to it. But there is only one region list and it is in the + * top-level controller. + * + * This could be changed so that struct pci_controller is only used + * for PCI controllers and a separate UCLASS (or perhaps + * UCLASS_PCI_GENERIC) is used for bridges. + */ struct pci_region regions[MAX_PCI_REGIONS]; int region_count; @@ -712,15 +722,6 @@ void pci_write_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum, u32 pci_read_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum); /** - * pciauto_setup_rom() - Set up access to a device ROM - * - * @hose: PCI hose to use - * @dev: PCI device to adjust - * @return 0 if done, -ve on error - */ -int pciauto_setup_rom(struct pci_controller *hose, pci_dev_t dev); - -/** * pci_hose_find_devices() - Find devices by vendor/device ID * * @hose: PCI hose to search |