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| author | Keerthy <j-keerthy@ti.com> | 2017-06-02 09:30:31 (GMT) |
|---|---|---|
| committer | Jaehoon Chung <jh80.chung@samsung.com> | 2017-06-09 11:25:16 (GMT) |
| commit | fc69d472621b5c7513bcb8b4e1fe58ca8f5e035a (patch) | |
| tree | 756376f5f7faee007ddc06ed7aed6524eb31982b /include/power/tps65218.h | |
| parent | e395b8848ac3a432faa70b4ba3bcbcbcc91ca555 (diff) | |
| download | u-boot-fc69d472621b5c7513bcb8b4e1fe58ca8f5e035a.tar.xz | |
board: ti: AM43XX: Add ddr voltage rail configuration
Add ddr voltage rail (dcdc3) configuration. Set the dcdc3
DDR supply to 1.35V.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'include/power/tps65218.h')
| -rw-r--r-- | include/power/tps65218.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/power/tps65218.h b/include/power/tps65218.h index e3538e2..43b9c9a 100644 --- a/include/power/tps65218.h +++ b/include/power/tps65218.h @@ -63,6 +63,7 @@ enum { #define TPS65218_DCDC_VOLT_SEL_1200MV 0x23 #define TPS65218_DCDC_VOLT_SEL_1260MV 0x29 #define TPS65218_DCDC_VOLT_SEL_1330MV 0x30 +#define TPS65218_DCDC3_VOLT_SEL_1350MV 0x12 #define TPS65218_CC_STAT (BIT(0) | BIT(1)) #define TPS65218_STATE (BIT(2) | BIT(3)) |