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author | Codrin Ciubotariu <codrin.ciubotariu@freescale.com> | 2015-12-15 13:21:06 (GMT) |
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committer | Joe Hershberger <joe.hershberger@ni.com> | 2016-01-28 18:22:19 (GMT) |
commit | aae0e68909bf2ef1b60d18c54105ab8b9c67c5a2 (patch) | |
tree | 5ee618d3daa2488bf3cd18d0d8caaa03b84e75a3 /include/vsc9953.h | |
parent | bf9f2ed83b16c6d037609278f66dbf54f40b1903 (diff) | |
download | u-boot-aae0e68909bf2ef1b60d18c54105ab8b9c67c5a2.tar.xz |
drivers: net: vsc9953: Add LAG support
You can now configure LAG on VSC9953's ports using the command:
ethsw [port <port_no>] aggr {[help] | show | <lag_group_no>}
A port must belong to a single LAG. By default, a port
belongs to a LAG equal to the port's number.
For each frame, a hash will be calculated based on
Source/Destination MAC addresses, Source/Destination IP(v4/v6)
addresses, Source/Destination ports. This hash will be used to
select a single egress port from LAG. This also assures
that frames from the same flow will always have the
same egress port.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Diffstat (limited to 'include/vsc9953.h')
-rw-r--r-- | include/vsc9953.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/include/vsc9953.h b/include/vsc9953.h index 35fcbb5..a2d4554 100644 --- a/include/vsc9953.h +++ b/include/vsc9953.h @@ -126,6 +126,7 @@ #define VSC9953_PORT_CFG_LEARN_AUTO 0x00000100 #define VSC9953_PORT_CFG_LEARN_CPU 0x00000200 #define VSC9953_PORT_CFG_LEARN_DROP 0x00000400 +#define VSC9953_PORT_CFG_PORTID_MASK 0x0000003c /* Macros for vsc9953_qsys_sys.switch_port_mode register */ #define VSC9953_PORT_ENA 0x00002000 @@ -156,6 +157,19 @@ /* Macros for vsc9953_ana_ana_tables.mach_data register */ #define VSC9953_MACHDATA_VID_MASK 0x1fff0000 +/* Macros for vsc9953_ana_common.aggr_cfg register */ +#define VSC9953_AC_RND_ENA 0x00000080 +#define VSC9953_AC_DMAC_ENA 0x00000040 +#define VSC9953_AC_SMAC_ENA 0x00000020 +#define VSC9953_AC_IP6_LBL_ENA 0x00000010 +#define VSC9953_AC_IP6_TCPUDP_ENA 0x00000008 +#define VSC9953_AC_IP4_SIPDIP_ENA 0x00000004 +#define VSC9953_AC_IP4_TCPUDP_ENA 0x00000002 +#define VSC9953_AC_MASK 0x000000fe + +/* Macros for vsc9953_ana_pgid.port_grp_id[] registers */ +#define VSC9953_PGID_PORT_MASK 0x000003ff + #define VSC9953_MAX_PORTS 10 #define VSC9953_PORT_CHECK(port) \ (((port) < 0 || (port) >= VSC9953_MAX_PORTS) ? 0 : 1) @@ -239,6 +253,10 @@ struct vsc9953_ana_ana { u32 port_mode[12]; }; +#define PGID_DST_START 0 +#define PGID_AGGR_START 64 +#define PGID_SRC_START 80 + struct vsc9953_ana_pgid { u32 port_grp_id[91]; }; |