diff options
author | Stefano Babic <sbabic@denx.de> | 2012-02-22 00:24:39 (GMT) |
---|---|---|
committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-05-15 06:31:30 (GMT) |
commit | 9f472e6540f5632ce27b779d841a006d1c1b3d55 (patch) | |
tree | 76e5576fc0981e75afefa0878e854bc45fd84a4b /include | |
parent | 8c38b5d03d701134b7d6e4eeea94c229f7470d27 (diff) | |
download | u-boot-9f472e6540f5632ce27b779d841a006d1c1b3d55.tar.xz |
SATA: add driver for MX5 / MX6 SOCs
This driver is part of Freescale's LTIB for
MX5 / MX6.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Terry Lv <r65388@freescale.com>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Dirk Behme <dirk.behme@de.bosch.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/ahci.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/include/ahci.h b/include/ahci.h index 465ea7f..c4fb9e7 100644 --- a/include/ahci.h +++ b/include/ahci.h @@ -30,12 +30,13 @@ #define AHCI_PCI_BAR 0x24 #define AHCI_MAX_SG 56 /* hardware max is 64K */ #define AHCI_CMD_SLOT_SZ 32 +#define AHCI_MAX_CMD_SLOT 32 #define AHCI_RX_FIS_SZ 256 #define AHCI_CMD_TBL_HDR 0x80 #define AHCI_CMD_TBL_CDB 0x40 #define AHCI_CMD_TBL_SZ AHCI_CMD_TBL_HDR + (AHCI_MAX_SG * 16) -#define AHCI_PORT_PRIV_DMA_SZ AHCI_CMD_SLOT_SZ + AHCI_CMD_TBL_SZ \ - + AHCI_RX_FIS_SZ +#define AHCI_PORT_PRIV_DMA_SZ (AHCI_CMD_SLOT_SZ * AHCI_MAX_CMD_SLOT + \ + AHCI_CMD_TBL_SZ + AHCI_RX_FIS_SZ) #define AHCI_CMD_ATAPI (1 << 5) #define AHCI_CMD_WRITE (1 << 6) #define AHCI_CMD_PREFETCH (1 << 7) |