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authorMinghuan Lian <Minghuan.Lian@nxp.com>2016-12-13 06:54:20 (GMT)
committerYork Sun <york.sun@nxp.com>2017-01-18 17:26:57 (GMT)
commitbe6430dc7a4be7818a924050c10fe5336231667e (patch)
tree29bc6f6943b56197c4e1054418fedc2c4ef6f224 /include
parent41873d1571613230faab17286fe40e1b192e6c2d (diff)
downloadu-boot-be6430dc7a4be7818a924050c10fe5336231667e.tar.xz
armv8: ls1043a: Enable PCIe and E1000 in defconfigs
The patch enables PCIe and E1000 in ls1043a defconfigs and removes unused PCIe related macro defines. Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/ls1043a_common.h17
1 files changed, 0 insertions, 17 deletions
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 3e70464..ff521ab 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -118,27 +118,10 @@
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE2 /* PCIE controller 2 */
#define CONFIG_PCIE3 /* PCIE controller 3 */
-#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
#define FSL_PCIE_COMPAT "fsl,ls1043a-pcie"
-#define CONFIG_SYS_PCI_64BIT
-
-#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF 0x00000000
-#define CONFIG_SYS_PCIE_CFG0_SIZE 0x00001000 /* 4k */
-#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF 0x00001000
-#define CONFIG_SYS_PCIE_CFG1_SIZE 0x00001000 /* 4k */
-
-#define CONFIG_SYS_PCIE_IO_BUS 0x00000000
-#define CONFIG_SYS_PCIE_IO_PHYS_OFF 0x00010000
-#define CONFIG_SYS_PCIE_IO_SIZE 0x00010000 /* 64k */
-
-#define CONFIG_SYS_PCIE_MEM_BUS 0x40000000
-#define CONFIG_SYS_PCIE_MEM_PHYS_OFF 0x40000000
-#define CONFIG_SYS_PCIE_MEM_SIZE 0x40000000 /* 1G */
-
#ifdef CONFIG_PCI
#define CONFIG_NET_MULTI
-#define CONFIG_E1000
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_CMD_PCI
#endif