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authorTom Rini <trini@konsulko.com>2017-03-19 18:49:26 (GMT)
committerTom Rini <trini@konsulko.com>2017-03-19 19:13:38 (GMT)
commit02ccab1908c405fe1449457d4a0d343784a30acb (patch)
tree3a5d41abff96a3af22587ace67713d5c0165b097 /include
parentf40574e2d78c96a3818c4fa2379382d924866a6e (diff)
parentd883fcc6bbb2fcc3df90857fee99c2f543a0289c (diff)
downloadu-boot-02ccab1908c405fe1449457d4a0d343784a30acb.tar.xz
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: configs/bk4r1_defconfig configs/colibri_vf_defconfig configs/pcm052_defconfig include/configs/colibri_vf.h include/configs/pcm052.h
Diffstat (limited to 'include')
-rw-r--r--include/configs/apalis_imx6.h1
-rw-r--r--include/configs/colibri_imx6.h1
-rw-r--r--include/configs/colibri_imx7.h9
-rw-r--r--include/configs/colibri_vf.h1
-rw-r--r--include/configs/gw_ventana.h13
-rw-r--r--include/configs/imx6qdl_icore.h2
-rw-r--r--include/configs/imx6qdl_icore_rqs.h36
-rw-r--r--include/configs/imx6ul_geam.h2
-rw-r--r--include/configs/imx6ul_isiot.h199
-rw-r--r--include/configs/mccmon6.h4
-rw-r--r--include/configs/mx7ulp_evk.h198
-rw-r--r--include/configs/opos6uldev.h219
-rw-r--r--include/configs/pcm052.h2
-rw-r--r--include/configs/tqma6.h16
-rw-r--r--include/configs/tqma6_mba6.h5
-rw-r--r--include/configs/vf610twr.h2
-rw-r--r--include/dt-bindings/clock/imx7ulp-clock.h161
-rw-r--r--include/fsl_lpuart.h72
18 files changed, 898 insertions, 45 deletions
diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h
index d6d976b..c0c575a 100644
--- a/include/configs/apalis_imx6.h
+++ b/include/configs/apalis_imx6.h
@@ -195,6 +195,7 @@
"${fdt_file} && setenv dtbparam \" - ${fdt_addr_r}\" && true\0"
#define MEM_LAYOUT_ENV_SETTINGS \
+ "bootm_size=0x20000000\0" \
"fdt_addr_r=0x12000000\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h
index c2322d8..0b58e5b 100644
--- a/include/configs/colibri_imx6.h
+++ b/include/configs/colibri_imx6.h
@@ -170,6 +170,7 @@
"${fdt_file} && setenv dtbparam \" - ${fdt_addr_r}\" && true\0"
#define MEM_LAYOUT_ENV_SETTINGS \
+ "bootm_size=0x10000000\0" \
"fdt_addr_r=0x12000000\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h
index 4da91d3..2c9c014 100644
--- a/include/configs/colibri_imx7.h
+++ b/include/configs/colibri_imx7.h
@@ -59,6 +59,7 @@
#define CONFIG_SERVERIP 192.168.10.1
#define MEM_LAYOUT_ENV_SETTINGS \
+ "bootm_size=0x10000000\0" \
"fdt_addr_r=0x82000000\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
@@ -117,13 +118,14 @@
"${board}/flash_blk.img && source ${loadaddr}\0" \
"setup=setenv setupargs " \
"console=tty1 console=${console}" \
- ",${baudrate}n8 ${memargs} consoleblank=0 ${mtdparts}\0" \
+ ",${baudrate}n8 ${memargs} consoleblank=0\0" \
"setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \
"setusbupdate=usb start && setenv interface usb && " \
"fatload ${interface} 0:1 ${loadaddr} " \
"${board}/flash_blk.img && source ${loadaddr}\0" \
"splashpos=m,m\0" \
"videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \
+ "updlevel=2\0"
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
@@ -158,8 +160,8 @@
#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
#define CONFIG_ENV_OFFSET (8 * SZ_64K)
#elif defined(CONFIG_ENV_IS_IN_NAND)
-#define CONFIG_ENV_OFFSET (4 * 1024 * 1024)
#define CONFIG_ENV_SECT_SIZE (128 * 1024)
+#define CONFIG_ENV_OFFSET (28 * CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
#endif
@@ -186,7 +188,8 @@
#define MTDIDS_DEFAULT "nand0=gpmi-nand"
#define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:" \
"512k(mx7-bcb)," \
- "3584k(u-boot)ro," \
+ "1536k(u-boot1)ro," \
+ "1536k(u-boot2)ro," \
"512k(u-boot-env)," \
"-(ubi)"
diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h
index 35f259c..888899e 100644
--- a/include/configs/colibri_vf.h
+++ b/include/configs/colibri_vf.h
@@ -14,7 +14,6 @@
#include <asm/arch/imx-regs.h>
-#define CONFIG_VF610
#define CONFIG_SYS_FSL_CLK
#define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 24e3150..1606f20 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -68,7 +68,7 @@
#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
#endif
-#else
+#elif defined(CONFIG_SPL_NAND_SUPPORT)
/* Enable NAND support */
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
@@ -143,6 +143,7 @@
#define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */
#define CONFIG_CMD_GSC
#define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */
+#define CONFIG_CMD_UNZIP /* gzwrite */
#define CONFIG_RBTREE
/* Ethernet support */
@@ -226,9 +227,11 @@
/* Persistent Environment Config */
#ifdef CONFIG_SPI_FLASH
-#define CONFIG_ENV_IS_IN_SPI_FLASH
+ #define CONFIG_ENV_IS_IN_SPI_FLASH
+#elif defined(CONFIG_SPL_NAND_SUPPORT)
+ #define CONFIG_ENV_IS_IN_NAND
#else
-#define CONFIG_ENV_IS_IN_NAND
+ #define CONFIG_ENV_IS_IN_MMC
#endif
#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_SYS_MMC_ENV_DEV 0
@@ -295,14 +298,14 @@
"fi\0" \
\
"uimage=uImage\0" \
- "mmc_root=/dev/mmcblk0p1 rootfstype=${fs} rootwait rw\0" \
+ "mmc_root=mmcblk0p1\0" \
"mmc_boot=" \
"setenv fsload \"${fs}load mmc ${disk}:${part}\"; " \
"mmc dev ${disk} && mmc rescan && " \
"setenv dtype mmc; run loadscript; " \
"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
"setenv bootargs console=${console},${baudrate} " \
- "root=/dev/mmcblk0p1 rootfstype=${fs} " \
+ "root=/dev/${mmc_root} rootfstype=${fs} " \
"rootwait rw ${video} ${extra}; " \
"if run loadfdt; then " \
"bootm ${loadaddr} - ${fdt_addr}; " \
diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h
index eb83d23..5a28b15 100644
--- a/include/configs/imx6qdl_icore.h
+++ b/include/configs/imx6qdl_icore.h
@@ -147,7 +147,7 @@
#ifdef CONFIG_FSL_USDHC
# define CONFIG_SYS_MMC_ENV_DEV 0
# define CONFIG_SYS_FSL_USDHC_NUM 1
-# define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
+# define CONFIG_SYS_FSL_ESDHC_ADDR 0
#endif
/* NAND */
diff --git a/include/configs/imx6qdl_icore_rqs.h b/include/configs/imx6qdl_icore_rqs.h
index 6f7195d..3358320 100644
--- a/include/configs/imx6qdl_icore_rqs.h
+++ b/include/configs/imx6qdl_icore_rqs.h
@@ -40,9 +40,7 @@
"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
"fdt_addr=0x18000000\0" \
"boot_fdt=try\0" \
- "mmcdev=0\0" \
"mmcpart=1\0" \
- "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
"mmcautodetect=yes\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} " \
"root=${mmcroot}\0" \
@@ -56,8 +54,7 @@
"fitboot=echo Booting FIT image from mmc ...; " \
"run mmcargs; " \
"bootm ${loadaddr}\0" \
- "mmcboot=echo Booting from mmc ...; " \
- "run mmcargs; " \
+ "_mmcboot=run mmcargs; " \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
"if run loadfdt; then " \
"bootm ${loadaddr} - ${fdt_addr}; " \
@@ -70,23 +67,24 @@
"fi; " \
"else " \
"bootm; " \
- "fi\0"
-
-#define CONFIG_BOOTCOMMAND \
- "mmc dev ${mmcdev};" \
- "if mmc rescan; then " \
- "if run loadbootscript; then " \
- "run bootscript; " \
- "else " \
- "if run loadfit; then " \
- "run fitboot; " \
+ "fi\0" \
+ "mmcboot=echo Booting from mmc ...; " \
+ "mmc dev ${mmcdev};" \
+ "if mmc rescan; then " \
+ "if run loadbootscript; then " \
+ "run bootscript; " \
"else " \
- "if run loadimage; then " \
- "run mmcboot; " \
+ "if run loadfit; then " \
+ "run fitboot; " \
+ "else " \
+ "if run loadimage; then " \
+ "run _mmcboot; " \
+ "fi; " \
"fi; " \
"fi; " \
- "fi; " \
- "fi"
+ "fi\0"
+
+#define CONFIG_BOOTCOMMAND "run $modeboot"
/* Miscellaneous configurable options */
#define CONFIG_SYS_MEMTEST_START 0x80000000
@@ -124,7 +122,7 @@
/* MMC */
#ifdef CONFIG_FSL_USDHC
# define CONFIG_SYS_MMC_ENV_DEV 0
-# define CONFIG_SYS_FSL_USDHC_NUM 1
+# define CONFIG_SYS_FSL_USDHC_NUM 2
# define CONFIG_SYS_FSL_ESDHC_ADDR 0
#endif
diff --git a/include/configs/imx6ul_geam.h b/include/configs/imx6ul_geam.h
index 23fa3ee..8bffacd 100644
--- a/include/configs/imx6ul_geam.h
+++ b/include/configs/imx6ul_geam.h
@@ -145,7 +145,7 @@
#ifdef CONFIG_FSL_USDHC
# define CONFIG_SYS_MMC_ENV_DEV 0
# define CONFIG_SYS_FSL_USDHC_NUM 1
-# define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
+# define CONFIG_SYS_FSL_ESDHC_ADDR 0
#endif
/* NAND */
diff --git a/include/configs/imx6ul_isiot.h b/include/configs/imx6ul_isiot.h
new file mode 100644
index 0000000..4009648
--- /dev/null
+++ b/include/configs/imx6ul_isiot.h
@@ -0,0 +1,199 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * Configuration settings for the Engicam Is.IoT MX6UL Starter Kits.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __IMX6UL_ISIOT_CONFIG_H
+#define __IMX6UL_ISIOT_CONFIG_H
+
+#include <linux/sizes.h>
+#include "mx6_common.h"
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
+
+/* Total Size of Environment Sector */
+#define CONFIG_ENV_SIZE SZ_128K
+
+/* Allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+/* Environment */
+#ifndef CONFIG_ENV_IS_NOWHERE
+/* Environment in MMC */
+# if defined(CONFIG_ENV_IS_IN_MMC)
+# define CONFIG_ENV_OFFSET 0x100000
+/* Environment in NAND */
+# elif defined(CONFIG_ENV_IS_IN_NAND)
+# define CONFIG_ENV_OFFSET 0x400000
+# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
+# endif
+#endif
+
+/* Default environment */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "script=boot.scr\0" \
+ "image=uImage\0" \
+ "fit_image=fit.itb\0" \
+ "splashpos=m,m\0" \
+ "console=ttymxc0\0" \
+ "fdt_high=0xffffffff\0" \
+ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
+ "fdt_addr=0x87800000\0" \
+ "boot_fdt=try\0" \
+ "mmcpart=1\0" \
+ "nandroot=ubi0:rootfs rootfstype=ubifs\0" \
+ "mmcautodetect=yes\0" \
+ "mmcargs=setenv bootargs console=${console},${baudrate} " \
+ "root=${mmcroot}\0" \
+ "ubiargs=setenv bootargs console=${console},${baudrate} " \
+ "ubi.mtd=5 root=${nandroot} ${mtdparts}\0" \
+ "loadbootscript=" \
+ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
+ "bootscript=echo Running bootscript from mmc ...; " \
+ "source\0" \
+ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
+ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
+ "loadfit=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${fit_image}\0" \
+ "fitboot=echo Booting FIT image from mmc ...; " \
+ "run mmcargs; " \
+ "bootm ${loadaddr}\0" \
+ "_mmcboot=run mmcargs; " \
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+ "if run loadfdt; then " \
+ "bootm ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootm; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "bootm; " \
+ "fi\0" \
+ "mmcboot=echo Booting from mmc ...; " \
+ "if mmc rescan; then " \
+ "if run loadbootscript; then " \
+ "run bootscript; " \
+ "else " \
+ "if run loadfit; then " \
+ "run fitboot; " \
+ "else " \
+ "if run loadimage; then " \
+ "run _mmcboot; " \
+ "fi; " \
+ "fi; " \
+ "fi; " \
+ "fi\0" \
+ "nandboot=echo Booting from nand ...; " \
+ "if mtdparts; then " \
+ "echo Starting nand boot ...; " \
+ "else " \
+ "mtdparts default; " \
+ "fi; " \
+ "run ubiargs; " \
+ "nand read ${loadaddr} kernel 0x800000; " \
+ "nand read ${fdt_addr} dtb 0x100000; " \
+ "bootm ${loadaddr} - ${fdt_addr}\0"
+
+#define CONFIG_BOOTCOMMAND "run $modeboot"
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_MEMTEST_START 0x80000000
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000)
+
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+#define CONFIG_SYS_HZ 1000
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
+
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
+ GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
+ CONFIG_SYS_INIT_SP_OFFSET)
+
+/* FIT */
+#ifdef CONFIG_FIT
+# define CONFIG_HASH_VERIFY
+# define CONFIG_SHA1
+# define CONFIG_SHA256
+# define CONFIG_IMAGE_FORMAT_LEGACY
+#endif
+
+/* UART */
+#ifdef CONFIG_MXC_UART
+# define CONFIG_MXC_UART_BASE UART1_BASE
+#endif
+
+/* MMC */
+#ifdef CONFIG_FSL_USDHC
+# define CONFIG_SYS_MMC_ENV_DEV 0
+# define CONFIG_SYS_FSL_USDHC_NUM 2
+# define CONFIG_SYS_FSL_ESDHC_ADDR 0
+#endif
+
+/* NAND */
+#ifdef CONFIG_NAND_MXS
+# define CONFIG_SYS_MAX_NAND_DEVICE 1
+# define CONFIG_SYS_NAND_BASE 0x40000000
+# define CONFIG_SYS_NAND_5_ADDR_CYCLE
+# define CONFIG_SYS_NAND_ONFI_DETECTION
+# define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
+# define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000
+
+/* MTD device */
+# define CONFIG_MTD_DEVICE
+# define CONFIG_CMD_MTDPARTS
+# define CONFIG_MTD_PARTITIONS
+# define MTDIDS_DEFAULT "nand0=gpmi-nand"
+# define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:2m(spl),2m(uboot)," \
+ "1m(env),8m(kernel),1m(dtb),-(rootfs)"
+
+/* UBI */
+# define CONFIG_CMD_UBIFS
+# define CONFIG_RBTREE
+# define CONFIG_LZO
+
+/* APBH DMA */
+# define CONFIG_APBH_DMA
+# define CONFIG_APBH_DMA_BURST
+# define CONFIG_APBH_DMA_BURST8
+#endif
+
+/* Ethernet */
+#ifdef CONFIG_FEC_MXC
+# define CONFIG_FEC_MXC_PHYADDR 0
+# define CONFIG_FEC_XCV_TYPE RMII
+
+# define CONFIG_MII
+# define CONFIG_PHYLIB
+# define CONFIG_PHY_SMSC
+#endif
+
+/* SPL */
+#ifdef CONFIG_SPL
+# ifdef CONFIG_NAND_MXS
+# define CONFIG_SPL_NAND_SUPPORT
+# else
+# define CONFIG_SPL_MMC_SUPPORT
+# endif
+
+# include "imx6_spl.h"
+# ifdef CONFIG_SPL_BUILD
+# undef CONFIG_DM_GPIO
+# undef CONFIG_DM_MMC
+# endif
+#endif
+
+#endif /* __IMX6UL_ISIOT_CONFIG_H */
diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h
index 8f1eddf..7bda977 100644
--- a/include/configs/mccmon6.h
+++ b/include/configs/mccmon6.h
@@ -118,7 +118,7 @@
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS \
- "console=ttymxc0,115200\0" \
+ "console=ttymxc0,115200 quiet\0" \
"fdtfile=imx6q-mccmon6.dtb\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
@@ -148,7 +148,7 @@
"boot_nor=" \
"setenv kernelnor 0x08180000;" \
"setenv dtbnor 0x09980000;" \
- "setenv bootargs console=${console} quiet " \
+ "setenv bootargs console=${console} " \
""MTDPARTS_DEFAULT" " \
"root=/dev/mmcblk1 rootfstype=ext4 rw rootwait noinitrd;" \
"cp.l ${dtbnor} ${dtbloadaddr} 0x8000;" \
diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h
new file mode 100644
index 0000000..f6e4b3b
--- /dev/null
+++ b/include/configs/mx7ulp_evk.h
@@ -0,0 +1,198 @@
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ *
+ * Configuration settings for the Freescale i.MX7ULP EVK board.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __MX7ULP_EVK_CONFIG_H
+#define __MX7ULP_EVK_CONFIG_H
+
+#include <linux/sizes.h>
+#include <asm/arch/imx-regs.h>
+
+/*Uncomment it to use secure boot*/
+/*#define CONFIG_SECURE_BOOT*/
+
+#ifdef CONFIG_SECURE_BOOT
+#ifndef CONFIG_CSF_SIZE
+#define CONFIG_CSF_SIZE 0x4000
+#endif
+#endif
+
+#define CONFIG_BOARD_POSTCLK_INIT
+#define CONFIG_SYS_BOOTM_LEN 0x1000000
+
+#define SRC_BASE_ADDR CMC1_RBASE
+#define IRAM_BASE_ADDR OCRAM_0_BASE
+#define IOMUXC_BASE_ADDR IOMUXC1_RBASE
+
+#define CONFIG_BOUNCE_BUFFER
+#define CONFIG_FSL_ESDHC
+#define CONFIG_FSL_USDHC
+#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
+
+#define CONFIG_SYS_FSL_USDHC_NUM 1
+
+#define CONFIG_SYS_FSL_ESDHC_ADDR 0
+#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
+#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
+#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
+#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
+
+#define CONFIG_ENV_OFFSET (12 * SZ_64K)
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_ENV_SIZE SZ_8K
+
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+
+/* Using ULP WDOG for reset */
+#define WDOG_BASE_ADDR WDG1_RBASE
+
+#define CONFIG_SYS_ARCH_TIMER
+#define CONFIG_SYS_HZ_CLOCK 1000000 /* Fixed at 1Mhz from TSTMR */
+
+#define CONFIG_INITRD_TAG
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+/*#define CONFIG_REVISION_TAG*/
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
+
+#define CONFIG_BOARD_EARLY_INIT_F
+
+/* UART */
+#define LPUART_BASE LPUART4_RBASE
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 115200
+
+#undef CONFIG_CMD_IMLS
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_AUTO_COMPLETE
+
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_PROMPT "=> "
+#define CONFIG_SYS_CBSIZE 512
+
+/* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS 256
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_STACKSIZE SZ_8K
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS 1
+
+#define CONFIG_SYS_TEXT_BASE 0x67800000
+#define PHYS_SDRAM 0x60000000
+#define PHYS_SDRAM_SIZE SZ_1G
+#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
+#define CONFIG_CMD_BOOTZ
+
+#define CONFIG_LOADADDR 0x60800000
+
+#define CONFIG_CMD_MEMTEST
+#define CONFIG_SYS_MEMTEST_END 0x9E000000
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "script=boot.scr\0" \
+ "image=zImage\0" \
+ "console=ttyLP0\0" \
+ "fdt_high=0xffffffff\0" \
+ "initrd_high=0xffffffff\0" \
+ "fdt_file=imx7ulp-evk.dtb\0" \
+ "fdt_addr=0x63000000\0" \
+ "boot_fdt=try\0" \
+ "earlycon=lpuart32,0x402D0010\0" \
+ "ip_dyn=yes\0" \
+ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
+ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+ "mmcautodetect=yes\0" \
+ "mmcargs=setenv bootargs console=${console},${baudrate} " \
+ "root=${mmcroot}\0" \
+ "loadbootscript=" \
+ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
+ "bootscript=echo Running bootscript from mmc ...; " \
+ "source\0" \
+ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
+ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
+ "mmcboot=echo Booting from mmc ...; " \
+ "run mmcargs; " \
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+ "if run loadfdt; then " \
+ "bootz ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootz; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "bootz; " \
+ "fi;\0" \
+ "netargs=setenv bootargs console=${console},${baudrate} " \
+ "root=/dev/nfs " \
+ "ip=:::::eth0:dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
+ "netboot=echo Booting from net ...; " \
+ "run netargs; " \
+ "if test ${ip_dyn} = yes; then " \
+ "setenv get_cmd dhcp; " \
+ "else " \
+ "setenv get_cmd tftp; " \
+ "fi; " \
+ "usb start; "\
+ "${get_cmd} ${image}; " \
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+ "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
+ "bootz ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootz; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "bootz; " \
+ "fi;\0" \
+
+#define CONFIG_BOOTCOMMAND \
+ "mmc dev ${mmcdev}; if mmc rescan; then " \
+ "if run loadbootscript; then " \
+ "run bootscript; " \
+ "else " \
+ "if run loadimage; then " \
+ "run mmcboot; " \
+ "fi; " \
+ "fi; " \
+ "fi"
+
+#define CONFIG_SYS_HZ 1000
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE SZ_256K
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+#define CONFIG_CMD_CACHE
+#endif
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h
new file mode 100644
index 0000000..e5ab067
--- /dev/null
+++ b/include/configs/opos6uldev.h
@@ -0,0 +1,219 @@
+/*
+ * Copyright (C) 2017 Armadeus Systems
+ *
+ * Configuration settings for the OPOS6ULDev board
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __OPOS6ULDEV_CONFIG_H
+#define __OPOS6ULDEV_CONFIG_H
+
+#include "mx6_common.h"
+
+#ifdef CONFIG_SPL
+#include "imx6_spl.h"
+
+#ifdef CONFIG_SPL_BUILD
+#undef CONFIG_DM_GPIO
+#undef CONFIG_DM_MMC
+
+#define CONFIG_MXC_UART_BASE UART1_BASE
+#endif
+#endif
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (16 << 20)
+
+/* Miscellaneous configurable options */
+#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS 1
+#define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+#define CONFIG_SYS_INIT_SP_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/* MMC */
+#define CONFIG_SYS_FSL_ESDHC_ADDR 0
+#define CONFIG_SUPPORT_EMMC_BOOT
+
+/* USB */
+#ifdef CONFIG_USB_EHCI_MX6
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS 0
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+#endif
+
+/* Ethernet */
+#ifdef CONFIG_FEC_MXC
+#define IMX_FEC_BASE ENET_BASE_ADDR
+#define CONFIG_FEC_MXC_PHYADDR 0x1
+#define CONFIG_FEC_XCV_TYPE RMII
+#define CONFIG_ETHPRIME "FEC"
+#define CONFIG_MII
+#endif
+
+/* LCD */
+#ifdef CONFIG_VIDEO
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_SPLASH_SCREEN_ALIGN
+#define CONFIG_SPLASH_SOURCE
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_VIDEO_BMP_LOGO
+#define CONFIG_CMD_BMP
+#define CONFIG_BMP_16BPP
+#define CONFIG_VIDEO_MXS
+#define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
+#endif
+
+/* Environment is stored in the eMMC boot partition */
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 0
+#define CONFIG_SYS_MMC_ENV_PART 1
+#define CONFIG_ENV_SIZE (10 * 1024)
+#define CONFIG_ENV_OFFSET (1024 * 1024) /* 1 MB */
+#define CONFIG_ENV_OFFSET_REDUND (1536 * 1024) /* 512KB from CONFIG_ENV_OFFSET */
+
+#define CONFIG_ENV_VERSION 100
+#define CONFIG_BOARD_NAME opos6ul
+#define ACFG_CONSOLE_DEV ttymxc0
+#define CONFIG_SYS_AUTOLOAD "no"
+#define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
+#define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," __stringify(CONFIG_BAUDRATE)
+#define CONFIG_PREBOOT "run check_env"
+#define CONFIG_BOOTCOMMAND "run emmcboot"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \
+ "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \
+ "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \
+ "fdt_addr=0x88000000\0" \
+ "fdt_high=0xffffffff\0" \
+ "fdt_name=" __stringify(CONFIG_BOARD_NAME) "dev\0" \
+ "initrd_high=0xffffffff\0" \
+ "ip_dyn=yes\0" \
+ "stdin=serial\0" \
+ "stdout=serial\0" \
+ "stderr=serial\0" \
+ "mmcdev=0\0" \
+ "mmcpart=2\0" \
+ "mmcroot=/dev/mmcblk0p2 ro\0" \
+ "mmcrootfstype=ext4 rootwait\0" \
+ "kernelimg=" __stringify(CONFIG_BOARD_NAME) "-linux.bin\0" \
+ "videomode=video=ctfb:x:800,y:480,depth:18,pclk:33033,le:96,ri:96,up:20,lo:21,hs:64,vs:4,sync:0,vmode:0\0" \
+ "check_env=if test -n ${flash_env_version}; " \
+ "then env default env_version; " \
+ "else env set flash_env_version ${env_version}; env save; " \
+ "fi; " \
+ "if itest ${flash_env_version} != ${env_version}; then " \
+ "echo \"*** Warning - Environment version" \
+ " change suggests: run flash_reset_env; reset\"; " \
+ "env default flash_reset_env; " \
+ "else exit; fi; \0" \
+ "flash_reset_env=env default -f -a && saveenv && " \
+ "echo Environment variables erased!\0" \
+ "download_uboot_spl=tftpboot ${loadaddr} ${board_name}-u-boot.spl\0" \
+ "flash_uboot_spl=" \
+ "if mmc dev 0 1; then " \
+ "setexpr sz ${filesize} / 0x200; " \
+ "setexpr sz ${sz} + 1; " \
+ "if mmc write ${loadaddr} 0x2 ${sz}; then " \
+ "echo Flashing of U-boot SPL succeed; " \
+ "else echo Flashing of U-boot SPL failed; " \
+ "fi; " \
+ "fi;\0" \
+ "download_uboot_img=tftpboot ${loadaddr} ${board_name}-u-boot.img\0" \
+ "flash_uboot_img=" \
+ "if mmc dev 0 1; then " \
+ "setexpr sz ${filesize} / 0x200; " \
+ "setexpr sz ${sz} + 1; " \
+ "if mmc write ${loadaddr} 0x8a ${sz}; then " \
+ "echo Flashing of U-boot image succeed; " \
+ "else echo Flashing of U-boot image failed; " \
+ "fi; " \
+ "fi;\0" \
+ "update_uboot=run download_uboot_spl flash_uboot_spl " \
+ "download_uboot_img flash_uboot_img\0" \
+ "download_kernel=tftpboot ${loadaddr} ${kernelimg}\0" \
+ "flash_kernel=" \
+ "if ext4write mmc ${mmcdev}:${mmcpart} ${loadaddr} /boot/${kernelimg} ${filesize}; then " \
+ "echo kernel update succeed; " \
+ "else echo kernel update failed; " \
+ "fi;\0" \
+ "update_kernel=run download_kernel flash_kernel\0" \
+ "download_dtb=tftpboot ${fdt_addr} imx6ul-${fdt_name}.dtb\0" \
+ "flash_dtb=" \
+ "if ext4write mmc ${mmcdev}:${mmcpart} ${fdt_addr} /boot/imx6ul-${fdt_name}.dtb ${filesize}; then " \
+ "echo dtb update succeed; " \
+ "else echo dtb update in failed; " \
+ "fi;\0" \
+ "update_dtb=run download_dtb flash_dtb\0" \
+ "download_rootfs=tftpboot ${loadaddr} ${board_name}-rootfs.ext4\0" \
+ "flash_rootfs=" \
+ "if mmc dev 0 0; then " \
+ "setexpr nbblocks ${filesize} / 0x200; " \
+ "setexpr nbblocks ${nbblocks} + 1; " \
+ "if mmc write ${loadaddr} 0x40800 ${nbblocks}; then " \
+ "echo Flashing of rootfs image succeed; " \
+ "else echo Flashing of rootfs image failed; " \
+ "fi; " \
+ "fi;\0" \
+ "update_rootfs=run download_rootfs flash_rootfs\0" \
+ "flash_failsafe=" \
+ "if mmc dev 0 0; then " \
+ "setexpr nbblocks ${filesize} / 0x200; " \
+ "setexpr nbblocks ${nbblocks} + 1; " \
+ "if mmc write ${loadaddr} 0x800 ${nbblocks}; then " \
+ "echo Flashing of rootfs image in failsafe partition succeed; " \
+ "else echo Flashing of rootfs image in failsafe partition failed; " \
+ "fi; " \
+ "fi;\0" \
+ "update_failsafe=run download_rootfs flash_failsafe\0" \
+ "download_userdata=tftpboot ${loadaddr} ${board_name}-user_data.ext4\0" \
+ "flash_userdata=" \
+ "if mmc dev 0 0; then " \
+ "setexpr nbblocks ${filesize} / 0x200; " \
+ "setexpr nbblocks ${nbblocks} + 1; " \
+ "if mmc write ${loadaddr} 0 ${nbblocks}; then " \
+ "echo Flashing of user_data image succeed; " \
+ "else echo Flashing of user_data image failed; " \
+ "fi; " \
+ "fi;\0" \
+ "update_userdata=run download_userdata flash_userdata; mmc rescan\0" \
+ "erase_userdata=" \
+ "if mmc dev 0 0; then " \
+ "echo Erasing eMMC User Data partition, no way out...; " \
+ "mw ${loadaddr} 0 0x200000; " \
+ "mmc write ${loadaddr} 0 0x1000; " \
+ "mmc write ${loadaddr} 0x800 0x1000; " \
+ "mmc write ${loadaddr} 0x40800 0x1000; " \
+ "mmc write ${loadaddr} 0x440800 0x1000; " \
+ "fi;" \
+ "mmc rescan\0" \
+ "update_all=run update_rootfs update_uboot\0" \
+ "initargs=setenv bootargs console=${consoledev},${baudrate} ${extrabootargs}\0" \
+ "addipargs=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
+ "${gatewayip}:${netmask}:${hostname}:eth0:off\0" \
+ "addmmcargs=setenv bootargs ${bootargs} root=${mmcroot} " \
+ "rootfstype=${mmcrootfstype}\0" \
+ "emmcboot=run initargs; run addmmcargs; " \
+ "load mmc ${mmcdev}:${mmcpart} ${loadaddr} /boot/${kernelimg} && " \
+ "load mmc ${mmcdev}:${mmcpart} ${fdt_addr} /boot/imx6ul-${fdt_name}.dtb && " \
+ "bootz ${loadaddr} - ${fdt_addr};\0" \
+ "emmcsafeboot=setenv mmcpart 1; setenv mmcroot /dev/mmcblk0p1 ro; run emmcboot;\0" \
+ "addnfsargs=setenv bootargs ${bootargs} root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "nfsboot=run initargs; run addnfsargs addipargs; " \
+ "nfs ${loadaddr} ${serverip}:${rootpath}/boot/${kernelimg} && " \
+ "nfs ${fdt_addr} ${serverip}:${rootpath}/boot/imx6ul-${fdt_name}.dtb && " \
+ "bootz ${loadaddr} - ${fdt_addr};\0"
+
+#endif /* __OPOS6ULDEV_CONFIG_H */
diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
index 8732687..286598d 100644
--- a/include/configs/pcm052.h
+++ b/include/configs/pcm052.h
@@ -11,8 +11,6 @@
#include <asm/arch/imx-regs.h>
-#define CONFIG_VF610
-
#define CONFIG_SKIP_LOWLEVEL_INIT
/* Enable passing of ATAGs */
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index 1c0a762..e72332c 100644
--- a/include/configs/tqma6.h
+++ b/include/configs/tqma6.h
@@ -1,7 +1,7 @@
/*
- * Copyright (C) 2013, 2014 Markus Niebel <Markus.Niebel@tq-group.com>
+ * Copyright (C) 2013, 2014, 2017 Markus Niebel <Markus.Niebel@tq-group.com>
*
- * Configuration settings for the TQ Systems TQMa6<Q,S> module.
+ * Configuration settings for the TQ Systems TQMa6<Q,D,DL,S> module.
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -18,18 +18,20 @@
/* #endif */
/* place code in last 4 MiB of RAM */
-#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S)
+#if defined(CONFIG_TQMA6S)
#define CONFIG_SYS_TEXT_BASE 0x2fc00000
-#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6D)
+#elif defined(CONFIG_TQMA6Q) || defined(CONFIG_TQMA6DL)
#define CONFIG_SYS_TEXT_BASE 0x4fc00000
#endif
#include "mx6_common.h"
-#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S)
+#if defined(CONFIG_TQMA6S)
#define PHYS_SDRAM_SIZE (512u * SZ_1M)
-#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6D)
-#define PHYS_SDRAM_SIZE (1024u * SZ_1M)
+#elif defined(CONFIG_TQMA6DL)
+#define PHYS_SDRAM_SIZE (SZ_1G)
+#elif defined(CONFIG_TQMA6Q)
+#define PHYS_SDRAM_SIZE (SZ_1G)
#endif
#define CONFIG_MXC_UART
diff --git a/include/configs/tqma6_mba6.h b/include/configs/tqma6_mba6.h
index 265aa4a..3d6e438 100644
--- a/include/configs/tqma6_mba6.h
+++ b/include/configs/tqma6_mba6.h
@@ -1,7 +1,8 @@
/*
- * Copyright (C) 2013 - 2015 Markus Niebel <Markus.Niebel@tq-group.com>
+ * Copyright (C) 2013 - 2017 Markus Niebel <Markus.Niebel@tq-group.com>
*
- * Configuration settings for the TQ Systems TQMa6<Q,S> module.
+ * Configuration settings for the TQ Systems TQMa6<Q,D,DL,S> module on
+ * MBa6 starter kit
*
* SPDX-License-Identifier: GPL-2.0+
*/
diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
index 3319bb9..ee90045 100644
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -11,8 +11,6 @@
#include <asm/arch/imx-regs.h>
-#define CONFIG_VF610
-
#define CONFIG_SYS_FSL_CLK
#define CONFIG_MACH_TYPE 4146
diff --git a/include/dt-bindings/clock/imx7ulp-clock.h b/include/dt-bindings/clock/imx7ulp-clock.h
new file mode 100644
index 0000000..0a955df
--- /dev/null
+++ b/include/dt-bindings/clock/imx7ulp-clock.h
@@ -0,0 +1,161 @@
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_IMX7ULP_H
+#define __DT_BINDINGS_CLOCK_IMX7ULP_H
+
+#define IMX7ULP_CLK_DUMMY 0
+#define IMX7ULP_CLK_CKIL 1
+#define IMX7ULP_CLK_OSC 2
+#define IMX7ULP_CLK_FIRC 3
+
+/* SCG1 */
+#define IMX7ULP_CLK_SPLL_PRE_SEL 4
+#define IMX7ULP_CLK_SPLL_PRE_DIV 5
+#define IMX7ULP_CLK_SPLL 6
+#define IMX7ULP_CLK_SPLL_POST_DIV1 7
+#define IMX7ULP_CLK_SPLL_POST_DIV2 8
+#define IMX7ULP_CLK_SPLL_PFD0 9
+#define IMX7ULP_CLK_SPLL_PFD1 10
+#define IMX7ULP_CLK_SPLL_PFD2 11
+#define IMX7ULP_CLK_SPLL_PFD3 12
+#define IMX7ULP_CLK_SPLL_PFD_SEL 13
+#define IMX7ULP_CLK_SPLL_SEL 14
+#define IMX7ULP_CLK_APLL_PRE_SEL 15
+#define IMX7ULP_CLK_APLL_PRE_DIV 16
+#define IMX7ULP_CLK_APLL 17
+#define IMX7ULP_CLK_APLL_POST_DIV1 18
+#define IMX7ULP_CLK_APLL_POST_DIV2 19
+#define IMX7ULP_CLK_APLL_PFD0 20
+#define IMX7ULP_CLK_APLL_PFD1 21
+#define IMX7ULP_CLK_APLL_PFD2 22
+#define IMX7ULP_CLK_APLL_PFD3 23
+#define IMX7ULP_CLK_APLL_PFD_SEL 24
+#define IMX7ULP_CLK_APLL_SEL 25
+#define IMX7ULP_CLK_UPLL 26
+#define IMX7ULP_CLK_SYS_SEL 27
+#define IMX7ULP_CLK_CORE_DIV 28
+#define IMX7ULP_CLK_BUS_DIV 29
+#define IMX7ULP_CLK_PLAT_DIV 30
+#define IMX7ULP_CLK_DDR_SEL 31
+#define IMX7ULP_CLK_DDR_DIV 32
+#define IMX7ULP_CLK_NIC_SEL 33
+#define IMX7ULP_CLK_NIC0_DIV 34
+#define IMX7ULP_CLK_GPU_DIV 35
+#define IMX7ULP_CLK_NIC1_DIV 36
+#define IMX7ULP_CLK_NIC1_BUS_DIV 37
+#define IMX7ULP_CLK_NIC1_EXT_DIV 38
+
+/* PCG2 */
+#define IMX7ULP_CLK_DMA1 39
+#define IMX7ULP_CLK_RGPIO2P1 40
+#define IMX7ULP_CLK_FLEXBUS 41
+#define IMX7ULP_CLK_SEMA42_1 42
+#define IMX7ULP_CLK_DMA_MUX1 43
+#define IMX7ULP_CLK_SNVS 44
+#define IMX7ULP_CLK_CAAM 45
+#define IMX7ULP_CLK_LPTPM4 46
+#define IMX7ULP_CLK_LPTPM5 47
+#define IMX7ULP_CLK_LPIT1 48
+#define IMX7ULP_CLK_LPSPI2 49
+#define IMX7ULP_CLK_LPSPI3 50
+#define IMX7ULP_CLK_LPI2C4 51
+#define IMX7ULP_CLK_LPI2C5 52
+#define IMX7ULP_CLK_LPUART4 53
+#define IMX7ULP_CLK_LPUART5 54
+#define IMX7ULP_CLK_FLEXIO1 55
+#define IMX7ULP_CLK_USB0 56
+#define IMX7ULP_CLK_USB1 57
+#define IMX7ULP_CLK_USB_PHY 58
+#define IMX7ULP_CLK_USB_PL301 59
+#define IMX7ULP_CLK_USDHC0 60
+#define IMX7ULP_CLK_USDHC1 61
+#define IMX7ULP_CLK_WDG1 62
+#define IMX7ULP_CLK_WDG2 63
+
+/* PCG3 */
+#define IMX7ULP_CLK_LPTPM6 64
+#define IMX7ULP_CLK_LPTPM7 65
+#define IMX7ULP_CLK_LPI2C6 66
+#define IMX7ULP_CLK_LPI2C7 67
+#define IMX7ULP_CLK_LPUART6 68
+#define IMX7ULP_CLK_LPUART7 69
+#define IMX7ULP_CLK_VIU 70
+#define IMX7ULP_CLK_DSI 71
+#define IMX7ULP_CLK_LCDIF 72
+#define IMX7ULP_CLK_MMDC 73
+#define IMX7ULP_CLK_PCTLC 74
+#define IMX7ULP_CLK_PCTLD 75
+#define IMX7ULP_CLK_PCTLE 76
+#define IMX7ULP_CLK_PCTLF 77
+#define IMX7ULP_CLK_GPU3D 78
+#define IMX7ULP_CLK_GPU2D 79
+
+#define IMX7ULP_CLK_MIPI_PLL 80
+#define IMX7ULP_CLK_SIRC 81
+
+#define IMX7ULP_CLK_SCG1_CLKOUT 82
+
+#define IMX7ULP_CLK_END 83
+
+/*cm4 clocks*/
+#define IMX7ULP_CM4_CLK_DUMMY 0
+#define IMX7ULP_CM4_CLK_CKIL 1
+#define IMX7ULP_CM4_CLK_OSC 2
+#define IMX7ULP_CM4_CLK_FIRC 3
+#define IMX7ULP_CM4_CLK_SIRC 4
+
+/* SCG0 */
+#define IMX7ULP_CM4_CLK_SPLL_VCO_PRE_SEL 5
+#define IMX7ULP_CM4_CLK_SPLL_VCO_PRE_DIV 6
+#define IMX7ULP_CM4_CLK_SPLL 7
+#define IMX7ULP_CM4_CLK_SPLL_VCO 8
+#define IMX7ULP_CM4_CLK_SPLL_VCO_POST_DIV1 9
+#define IMX7ULP_CM4_CLK_SPLL_VCO_POST_DIV2 10
+#define IMX7ULP_CM4_CLK_SPLL_PFD0 11
+#define IMX7ULP_CM4_CLK_SPLL_PFD1 12
+#define IMX7ULP_CM4_CLK_SPLL_PFD2 13
+#define IMX7ULP_CM4_CLK_SPLL_PFD3 14
+#define IMX7ULP_CM4_CLK_SPLL_PFD_SEL 15
+#define IMX7ULP_CM4_CLK_SPLL_PFD 16
+#define IMX7ULP_CM4_CLK_SPLL_SEL 17
+#define IMX7ULP_CM4_CLK_APLL_VCO_PRE_SEL 18
+#define IMX7ULP_CM4_CLK_APLL_VCO_PRE_DIV 19
+#define IMX7ULP_CM4_CLK_APLL 20
+#define IMX7ULP_CM4_CLK_APLL_VCO 21
+#define IMX7ULP_CM4_CLK_APLL_VCO_POST_DIV1 22
+#define IMX7ULP_CM4_CLK_APLL_VCO_POST_DIV2 23
+#define IMX7ULP_CM4_CLK_APLL_PFD0 24
+#define IMX7ULP_CM4_CLK_APLL_PFD1 25
+#define IMX7ULP_CM4_CLK_APLL_PFD2 26
+#define IMX7ULP_CM4_CLK_APLL_PFD3 27
+#define IMX7ULP_CM4_CLK_APLL_PFD_SEL 28
+#define IMX7ULP_CM4_CLK_APLL_PFD 29
+#define IMX7ULP_CM4_CLK_APLL_SEL 30
+#define IMX7ULP_CM4_CLK_APLL_PFD0_PRE_DIV 31
+#define IMX7ULP_CM4_CLK_SYS_SEL 32
+#define IMX7ULP_CM4_CLK_CORE_DIV 33
+#define IMX7ULP_CM4_CLK_BUS_DIV 34
+#define IMX7ULP_CM4_CLK_PLAT_DIV 35
+#define IMX7ULP_CM4_CLK_SLOW_DIV 36
+
+#define IMX7ULP_CM4_CLK_SAI0_SEL 37
+#define IMX7ULP_CM4_CLK_SAI0_DIV 38
+#define IMX7ULP_CM4_CLK_SAI0_ROOT 39
+#define IMX7ULP_CM4_CLK_SAI0_IPG 40
+#define IMX7ULP_CM4_CLK_SAI1_SEL 41
+#define IMX7ULP_CM4_CLK_SAI1_DIV 42
+#define IMX7ULP_CM4_CLK_SAI1_ROOT 43
+#define IMX7ULP_CM4_CLK_SAI1_IPG 44
+
+#define IMX7ULP_CLK_SCG0_CLKOUT 45
+
+#define IMX7ULP_CM4_CLK_END 46
+
+#endif /* __DT_BINDINGS_CLOCK_IMX7ULP_H */
diff --git a/include/fsl_lpuart.h b/include/fsl_lpuart.h
new file mode 100644
index 0000000..4643ee7
--- /dev/null
+++ b/include/fsl_lpuart.h
@@ -0,0 +1,72 @@
+/*
+ * Copyright 2016 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ *
+ */
+
+#ifdef CONFIG_ARCH_MX7ULP
+struct lpuart_fsl_reg32 {
+ u32 verid;
+ u32 param;
+ u32 global;
+ u32 pincfg;
+ u32 baud;
+ u32 stat;
+ u32 ctrl;
+ u32 data;
+ u32 match;
+ u32 modir;
+ u32 fifo;
+ u32 water;
+};
+#else
+struct lpuart_fsl_reg32 {
+ u32 baud;
+ u32 stat;
+ u32 ctrl;
+ u32 data;
+ u32 match;
+ u32 modir;
+ u32 fifo;
+ u32 water;
+};
+#endif
+
+struct lpuart_fsl {
+ u8 ubdh;
+ u8 ubdl;
+ u8 uc1;
+ u8 uc2;
+ u8 us1;
+ u8 us2;
+ u8 uc3;
+ u8 ud;
+ u8 uma1;
+ u8 uma2;
+ u8 uc4;
+ u8 uc5;
+ u8 ued;
+ u8 umodem;
+ u8 uir;
+ u8 reserved;
+ u8 upfifo;
+ u8 ucfifo;
+ u8 usfifo;
+ u8 utwfifo;
+ u8 utcfifo;
+ u8 urwfifo;
+ u8 urcfifo;
+ u8 rsvd[28];
+};
+
+/* Used on i.MX7ULP */
+#define LPUART_BAUD_BOTHEDGE_MASK (0x20000)
+#define LPUART_BAUD_OSR_MASK (0x1F000000)
+#define LPUART_BAUD_OSR_SHIFT (24)
+#define LPUART_BAUD_OSR(x) ((((uint32_t)(x)) << 24) & 0x1F000000)
+#define LPUART_BAUD_SBR_MASK (0x1FFF)
+#define LPUART_BAUD_SBR_SHIFT (0U)
+#define LPUART_BAUD_SBR(x) (((uint32_t)(x)) & 0x1FFF)
+#define LPUART_BAUD_M10_MASK (0x20000000U)
+#define LPUART_BAUD_SBNS_MASK (0x2000U)