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author | Matthias Schiffer <mschiffer@universe-factory.net> | 2016-03-05 03:15:40 (GMT) |
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committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2016-03-09 10:00:40 (GMT) |
commit | 499b84752140a8b40f8f0956c72357743f755250 (patch) | |
tree | 35d06f159bdc7df5a9fa8819c7d68801fa4506cb /include | |
parent | deff6fb3a7790e93264292982000275e78bb12e5 (diff) | |
download | u-boot-499b84752140a8b40f8f0956c72357743f755250.tar.xz |
MIPS: fix mips_cache fallback without __builtin_mips_cache
The "R" constraint supplies the address of an variable in a register. Use
"r" instead and adjust asm to supply the content of addr in a register
instead.
Fixes: 2b8bcc5a ("MIPS: avoid .set ISA for cache operations")
Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions