diff options
author | Marek Vasut <marex@denx.de> | 2015-07-25 17:33:56 (GMT) |
---|---|---|
committer | Marek Vasut <marex@denx.de> | 2015-08-08 12:14:08 (GMT) |
commit | 6ab00db226296b9512baf00d1dc1728e599e385d (patch) | |
tree | a38b71fae189aeff8bef959c7346ed3d24c06568 /include | |
parent | e14d3f79282ce7654d2848bb8b8f74a81702fa35 (diff) | |
download | u-boot-6ab00db226296b9512baf00d1dc1728e599e385d.tar.xz |
arm: socfpga: misc: Reset ethernet from OF
Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc
hardcoded values in the U-Boot code. Since we don't have a proper reset
framework in place yet, we have to do this slightly ad-hoc parsing of the
OF tree instead.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/configs/socfpga_arria5.h | 1 | ||||
-rw-r--r-- | include/configs/socfpga_cyclone5.h | 1 | ||||
-rw-r--r-- | include/fdtdec.h | 1 |
3 files changed, 1 insertions, 2 deletions
diff --git a/include/configs/socfpga_arria5.h b/include/configs/socfpga_arria5.h index ff02ed5..f6b54a3 100644 --- a/include/configs/socfpga_arria5.h +++ b/include/configs/socfpga_arria5.h @@ -48,7 +48,6 @@ /* Ethernet on SoC (EMAC) */ #if defined(CONFIG_CMD_NET) -#define CONFIG_EMAC_BASE SOCFPGA_EMAC1_ADDRESS /* PHY */ #define CONFIG_PHY_MICREL diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h index 90ba0c9..838fc58 100644 --- a/include/configs/socfpga_cyclone5.h +++ b/include/configs/socfpga_cyclone5.h @@ -48,7 +48,6 @@ /* Ethernet on SoC (EMAC) */ #if defined(CONFIG_CMD_NET) -#define CONFIG_EMAC_BASE SOCFPGA_EMAC1_ADDRESS /* PHY */ #define CONFIG_PHY_MICREL diff --git a/include/fdtdec.h b/include/fdtdec.h index c9a5c9a..eac679e 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -181,6 +181,7 @@ enum fdt_compat_id { COMPAT_SOCIONEXT_XHCI, /* Socionext UniPhier xHCI */ COMPAT_INTEL_PCH, /* Intel PCH */ COMPAT_INTEL_IRQ_ROUTER, /* Intel Interrupt Router */ + COMPAT_ALTERA_SOCFPGA_DWMAC, /* SoCFPGA Ethernet controller */ COMPAT_COUNT, }; |