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authorFelix Radensky <felix@embedded-sol.com>2009-09-27 21:56:12 (GMT)
committerStefan Roese <sr@denx.de>2009-10-02 11:53:28 (GMT)
commitd24bd2517a2b847f773453eab0ee5b1c8ebc74ba (patch)
treef5e7c0f371867fc03adafc3da8fe2916b245e468 /lib_generic
parent1d96cfe8f5eebfc6ea39d1a387f35ca4499e6b67 (diff)
downloadu-boot-d24bd2517a2b847f773453eab0ee5b1c8ebc74ba.tar.xz
ppc4xx: Reorganize DDR2 ECC handling
Reorganize DDR2 ECC handling to use common code for SPD DIMMs and soldered SDRAM. Also, use common code to display SDRAM info (ECC, CAS latency) for SPD and soldered SDRAM variants. Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Stefan Roese <sr@denx.de>
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