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authorCalvin Johnson <calvin.johnson@nxp.com>2018-01-16 05:48:57 (GMT)
committerPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>2018-01-17 12:33:14 (GMT)
commitbec6a126ba150701868e553ab709a7aab5d20d85 (patch)
tree4dec93e48df301fb38bb8b9017d2fcb841bc967f /post/lib_powerpc/cmp.c
parentb751686deaf7aaf7bc3ef3b9c63e07de02bfe0f6 (diff)
downloadu-boot-bec6a126ba150701868e553ab709a7aab5d20d85.tar.xz
armv8: fsl-lsch2: configure pfe's DDR and HDBUS interfaces and ECC
1. Set AWCACHE0 attribute of PFE DDR and HDBUS master interfaces to bufferable. 2. Set RD/WR QoS for PFE DDR and HDBUS AXI master interfaces. 3. Disable ECC detection for PFE. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Changes in v2: -Improved commit message to provide more description -Replaced magic numbers with proper definitions
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