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| author | Michal Simek <michal.simek@xilinx.com> | 2016-04-14 12:15:49 (GMT) |
|---|---|---|
| committer | Heiko Schocher <hs@denx.de> | 2016-05-17 06:28:49 (GMT) |
| commit | ad72e7622bd587dc798fbac0351b558fb18caa97 (patch) | |
| tree | ac5d0eada6cd66d544a48e73e19fcc942cd65adc /test/dm | |
| parent | 6150be9094bb155022da3843b56e6314edf54305 (diff) | |
| download | u-boot-ad72e7622bd587dc798fbac0351b558fb18caa97.tar.xz | |
i2c: cdns: Support different bus speeds
400kHz is maximum freq which can be used on Xilinx ZynqMP.
Support it with standard divider calculator.
Input freq is hardcoded to 100MHz input freq till we have clock driver
which can provide this information for exact configuration.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'test/dm')
0 files changed, 0 insertions, 0 deletions