diff options
| -rw-r--r-- | arch/arm/mach-keystone/clock.c | 10 | ||||
| -rw-r--r-- | arch/arm/mach-keystone/include/mach/clock.h | 1 | ||||
| -rw-r--r-- | board/ti/ks2_evm/board.c | 4 |
3 files changed, 12 insertions, 3 deletions
diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c index fc3eadb..6cb6467 100644 --- a/arch/arm/mach-keystone/clock.c +++ b/arch/arm/mach-keystone/clock.c @@ -33,6 +33,11 @@ const struct keystone_pll_regs keystone_pll_regs[] = { [DDR3B_PLL] = {KS2_DDR3BPLLCTL0, KS2_DDR3BPLLCTL1}, }; +inline void pll_pa_clk_sel(void) +{ + setbits_le32(keystone_pll_regs[PASS_PLL].reg1, CFG_PLLCTL1_PAPLL_MASK); +} + static void wait_for_completion(const struct pll_init_data *data) { int i; @@ -180,9 +185,8 @@ void configure_secondary_pll(const struct pll_init_data *data) sdelay(21000); /* Select the Output of PASS PLL as input to PASS */ - if (data->pll == PASS_PLL) - setbits_le32(keystone_pll_regs[data->pll].reg1, - CFG_PLLCTL1_PAPLL_MASK); + if (data->pll == PASS_PLL && cpu_is_k2hk()) + pll_pa_clk_sel(); /* Select the Output of ARM PLL as input to ARM */ if (data->pll == TETRIS_PLL) diff --git a/arch/arm/mach-keystone/include/mach/clock.h b/arch/arm/mach-keystone/include/mach/clock.h index ddc5f8e..7e51702 100644 --- a/arch/arm/mach-keystone/include/mach/clock.h +++ b/arch/arm/mach-keystone/include/mach/clock.h @@ -118,6 +118,7 @@ unsigned long clk_round_rate(unsigned int clk, unsigned long hz); int clk_set_rate(unsigned int clk, unsigned long hz); int get_max_dev_speed(void); int get_max_arm_speed(void); +void pll_pa_clk_sel(void); #endif #endif diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c index 859a260..bee42bc 100644 --- a/board/ti/ks2_evm/board.c +++ b/board/ti/ks2_evm/board.c @@ -14,6 +14,7 @@ #include <fdt_support.h> #include <asm/arch/ddr3.h> #include <asm/arch/psc_defs.h> +#include <asm/arch/clock.h> #include <asm/ti-common/ti-aemif.h> #include <asm/ti-common/keystone_net.h> @@ -81,6 +82,9 @@ int board_eth_init(bd_t *bis) if (psc_enable_module(KS2_LPSC_CRYPTO)) return -1; + if (cpu_is_k2e() || cpu_is_k2l()) + pll_pa_clk_sel(); + port_num = get_num_eth_ports(); for (j = 0; j < port_num; j++) { |