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-rw-r--r--arch/arm/dts/tegra186.dtsi23
-rw-r--r--arch/arm/mach-mvebu/cpu.c9
-rw-r--r--arch/arm/mach-mvebu/include/mach/soc.h2
-rw-r--r--arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c2
-rw-r--r--arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c39
-rw-r--r--drivers/i2c/tegra186_bpmp_i2c.c10
-rw-r--r--drivers/i2c/tegra_i2c.c2
-rw-r--r--drivers/mmc/tegra_mmc.c6
-rw-r--r--drivers/spi/tegra20_sflash.c4
-rw-r--r--drivers/spi/tegra20_slink.c4
-rw-r--r--drivers/spi/tegra210_qspi.c3
-rw-r--r--include/configs/clearfog.h2
-rw-r--r--include/configs/db-88f6720.h2
-rw-r--r--include/configs/db-88f6820-gp.h2
-rw-r--r--include/configs/db-mv784mp-gp.h2
-rw-r--r--include/configs/ds414.h2
-rw-r--r--include/configs/maxbcm.h2
-rw-r--r--include/configs/theadorable.h2
-rw-r--r--tools/kwboot.c16
19 files changed, 64 insertions, 70 deletions
diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi
index d9e7f03..f878b65 100644
--- a/arch/arm/dts/tegra186.dtsi
+++ b/arch/arm/dts/tegra186.dtsi
@@ -45,7 +45,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C1>;
- clock-names = "i2c";
+ clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C1>;
reset-names = "i2c";
status = "disabled";
@@ -58,7 +58,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C3>;
- clock-names = "i2c";
+ clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C3>;
reset-names = "i2c";
status = "disabled";
@@ -71,7 +71,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C4>;
- clock-names = "i2c";
+ clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C4>;
reset-names = "i2c";
status = "disabled";
@@ -84,7 +84,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C6>;
- clock-names = "i2c";
+ clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C6>;
reset-names = "i2c";
status = "disabled";
@@ -97,7 +97,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C7>;
- clock-names = "i2c";
+ clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C7>;
reset-names = "i2c";
status = "disabled";
@@ -110,7 +110,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C9>;
- clock-names = "i2c";
+ clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C9>;
reset-names = "i2c";
status = "disabled";
@@ -120,9 +120,8 @@
compatible = "nvidia,tegra186-sdhci";
reg = <0x0 0x03400000 0x0 0x200>;
resets = <&bpmp TEGRA186_RESET_SDMMC1>;
- reset-names = "sdmmc";
+ reset-names = "sdhci";
clocks = <&bpmp TEGRA186_CLK_SDMMC1>;
- clock-names = "sdmmc";
interrupts = <GIC_SPI 62 0x04>;
status = "disabled";
};
@@ -131,9 +130,8 @@
compatible = "nvidia,tegra186-sdhci";
reg = <0x0 0x03460000 0x0 0x200>;
resets = <&bpmp TEGRA186_RESET_SDMMC4>;
- reset-names = "sdmmc";
+ reset-names = "sdhci";
clocks = <&bpmp TEGRA186_CLK_SDMMC4>;
- clock-names = "sdmmc";
interrupts = <GIC_SPI 31 0x04>;
status = "disabled";
};
@@ -166,7 +164,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C2>;
- clock-names = "i2c";
+ clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C2>;
reset-names = "i2c";
status = "disabled";
@@ -179,7 +177,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bpmp TEGRA186_CLK_I2C8>;
- clock-names = "i2c";
+ clock-names = "div-clk";
resets = <&bpmp TEGRA186_RESET_I2C8>;
reset-names = "i2c";
status = "disabled";
@@ -311,7 +309,6 @@
bpmp_i2c: i2c {
compatible = "nvidia,tegra186-bpmp-i2c";
- nvidia,bpmp = <&bpmp>;
nvidia,bpmp-bus-id = <5>;
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index fd66f59..5eb2a39 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -452,8 +452,15 @@ int arch_cpu_init(void)
u32 mvebu_get_nand_clock(void)
{
+ u32 reg;
+
+ if (mvebu_soc_family() == MVEBU_SOC_A38X)
+ reg = MVEBU_DFX_DIV_CLK_CTRL(1);
+ else
+ reg = MVEBU_CORE_DIV_CLK_CTRL(1);
+
return CONFIG_SYS_MVEBU_PLL_CLOCK /
- ((readl(MVEBU_CORE_DIV_CLK_CTRL(1)) &
+ ((readl(reg) &
NAND_ECC_DIVCKL_RATIO_MASK) >> NAND_ECC_DIVCKL_RATIO_OFFS);
}
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index 13c9f29..6342cdc 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -73,6 +73,7 @@
#define MVEBU_NAND_BASE (MVEBU_REGISTER(0xd0000))
#define MVEBU_SDIO_BASE (MVEBU_REGISTER(0xd8000))
#define MVEBU_LCD_BASE (MVEBU_REGISTER(0xe0000))
+#define MVEBU_DFX_BASE (MVEBU_REGISTER(0xe4000))
#define SOC_COHERENCY_FABRIC_CTRL_REG (MVEBU_REGISTER(0x20200))
#define MBUS_ERR_PROP_EN (1 << 8)
@@ -92,6 +93,7 @@
#define SPI_PUP_EN BIT(5)
#define MVEBU_CORE_DIV_CLK_CTRL(i) (MVEBU_CLOCK_BASE + ((i) * 0x8))
+#define MVEBU_DFX_DIV_CLK_CTRL(i) (MVEBU_DFX_BASE + 0x250 + ((i) * 0x4))
#define NAND_ECC_DIVCKL_RATIO_OFFS 8
#define NAND_ECC_DIVCKL_RATIO_MASK (0x3F << NAND_ECC_DIVCKL_RATIO_OFFS)
diff --git a/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c b/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
index 06a7715..98c447c 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
@@ -184,7 +184,7 @@ int hws_pex_config(const struct serdes_map *serdes_map, u8 count)
DEBUG_INIT_S("PCIe, Idx ");
DEBUG_INIT_D(pex_idx, 1);
DEBUG_INIT_S
- (": Link upgraded to Gen2 based on client cpabilities\n");
+ (": Link upgraded to Gen2 based on client capabilities\n");
}
/* Update pex DEVICE ID */
diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
index 7d67199..820219e 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
@@ -835,25 +835,26 @@ u32 hws_serdes_topology_verify(enum serdes_type serdes_type, u32 serdes_id,
}
} else {
test_result = SERDES_ALREADY_IN_USE;
- if (test_result == SERDES_ALREADY_IN_USE) {
- printf("%s: Error: serdes lane %d is configured to type %s: type already in use\n",
- __func__, serdes_id,
- serdes_type_to_string[serdes_type]);
- return MV_FAIL;
- } else if (test_result == WRONG_NUMBER_OF_UNITS) {
- printf("%s: Warning: serdes lane %d is set to type %s.\n",
- __func__, serdes_id,
- serdes_type_to_string[serdes_type]);
- printf("%s: Maximum supported lanes are already set to this type (limit = %d)\n",
- __func__, serd_max_num);
- return MV_FAIL;
- } else if (test_result == UNIT_NUMBER_VIOLATION) {
- printf("%s: Warning: serdes lane %d type is %s: current device support only %d units of this type.\n",
- __func__, serdes_id,
- serdes_type_to_string[serdes_type],
- serd_max_num);
- return MV_FAIL;
- }
+ }
+
+ if (test_result == SERDES_ALREADY_IN_USE) {
+ printf("%s: Error: serdes lane %d is configured to type %s: type already in use\n",
+ __func__, serdes_id,
+ serdes_type_to_string[serdes_type]);
+ return MV_FAIL;
+ } else if (test_result == WRONG_NUMBER_OF_UNITS) {
+ printf("%s: Warning: serdes lane %d is set to type %s.\n",
+ __func__, serdes_id,
+ serdes_type_to_string[serdes_type]);
+ printf("%s: Maximum supported lanes are already set to this type (limit = %d)\n",
+ __func__, serd_max_num);
+ return MV_FAIL;
+ } else if (test_result == UNIT_NUMBER_VIOLATION) {
+ printf("%s: Warning: serdes lane %d type is %s: current device support only %d units of this type.\n",
+ __func__, serdes_id,
+ serdes_type_to_string[serdes_type],
+ serd_max_num);
+ return MV_FAIL;
}
return MV_OK;
diff --git a/drivers/i2c/tegra186_bpmp_i2c.c b/drivers/i2c/tegra186_bpmp_i2c.c
index 88e8413..513c414 100644
--- a/drivers/i2c/tegra186_bpmp_i2c.c
+++ b/drivers/i2c/tegra186_bpmp_i2c.c
@@ -89,16 +89,6 @@ static int tegra186_bpmp_i2c_xfer(struct udevice *dev, struct i2c_msg *msg,
static int tegra186_bpmp_i2c_probe(struct udevice *dev)
{
struct tegra186_bpmp_i2c *priv = dev_get_priv(dev);
- int ret;
- struct fdtdec_phandle_args args;
-
- ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev->of_offset,
- "nvidia,bpmp", NULL, 0, 0, &args);
- if (ret < 0) {
- debug("%s: fdtdec_parse_phandle_with_args() failed: %d\n",
- __func__, ret);
- return ret;
- }
priv->bpmp_bus_id = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
"nvidia,bpmp-bus-id", U32_MAX);
diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c
index 31ba263..0dbcc5a 100644
--- a/drivers/i2c/tegra_i2c.c
+++ b/drivers/i2c/tegra_i2c.c
@@ -414,7 +414,7 @@ static int tegra_i2c_probe(struct udevice *dev)
error("reset_get_by_name() failed: %d\n", ret);
return ret;
}
- ret = clk_get_by_name(dev, "i2c", &i2c_bus->clk);
+ ret = clk_get_by_name(dev, "div-clk", &i2c_bus->clk);
if (ret) {
error("clk_get_by_name() failed: %d\n", ret);
return ret;
diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c
index f0a39a6..3d0845e 100644
--- a/drivers/mmc/tegra_mmc.c
+++ b/drivers/mmc/tegra_mmc.c
@@ -648,12 +648,12 @@ static int mmc_get_config(const void *blob, int node, struct mmc_host *host,
struct udevice dev;
int ret;
dev.of_offset = node;
- ret = reset_get_by_name(&dev, "sdmmc", &host->reset_ctl);
+ ret = reset_get_by_name(&dev, "sdhci", &host->reset_ctl);
if (ret) {
- debug("reset_get_by_index() failed: %d\n", ret);
+ debug("reset_get_by_name() failed: %d\n", ret);
return ret;
}
- ret = clk_get_by_name(&dev, "sdmmc", &host->clk);
+ ret = clk_get_by_index(&dev, 0, &host->clk);
if (ret) {
debug("clk_get_by_index() failed: %d\n", ret);
return ret;
diff --git a/drivers/spi/tegra20_sflash.c b/drivers/spi/tegra20_sflash.c
index 6888a96..ce3a2d3 100644
--- a/drivers/spi/tegra20_sflash.c
+++ b/drivers/spi/tegra20_sflash.c
@@ -122,6 +122,10 @@ static int tegra20_sflash_probe(struct udevice *bus)
priv->freq = plat->frequency;
priv->periph_id = plat->periph_id;
+ /* Change SPI clock to correct frequency, PLLP_OUT0 source */
+ clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH,
+ priv->freq);
+
return 0;
}
diff --git a/drivers/spi/tegra20_slink.c b/drivers/spi/tegra20_slink.c
index 238edec..e1da23b 100644
--- a/drivers/spi/tegra20_slink.c
+++ b/drivers/spi/tegra20_slink.c
@@ -128,6 +128,10 @@ static int tegra30_spi_probe(struct udevice *bus)
priv->freq = plat->frequency;
priv->periph_id = plat->periph_id;
+ /* Change SPI clock to correct frequency, PLLP_OUT0 source */
+ clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH,
+ priv->freq);
+
return 0;
}
diff --git a/drivers/spi/tegra210_qspi.c b/drivers/spi/tegra210_qspi.c
index 6bbbe93..026cff0 100644
--- a/drivers/spi/tegra210_qspi.c
+++ b/drivers/spi/tegra210_qspi.c
@@ -131,6 +131,9 @@ static int tegra210_qspi_probe(struct udevice *bus)
priv->freq = plat->frequency;
priv->periph_id = plat->periph_id;
+ /* Change SPI clock to correct frequency, PLLP_OUT0 source */
+ clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, priv->freq);
+
return 0;
}
diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
index ffaeedb..6cbdee2 100644
--- a/include/configs/clearfog.h
+++ b/include/configs/clearfog.h
@@ -133,8 +133,6 @@
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_BUS 0
-#define CONFIG_SPL_SPI_CS 0
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
#endif
diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h
index 01c7895..4e00812 100644
--- a/include/configs/db-88f6720.h
+++ b/include/configs/db-88f6720.h
@@ -100,8 +100,6 @@
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_BUS 0
-#define CONFIG_SPL_SPI_CS 0
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h
index 3539a62..88614b3 100644
--- a/include/configs/db-88f6820-gp.h
+++ b/include/configs/db-88f6820-gp.h
@@ -134,8 +134,6 @@
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_BUS 0
-#define CONFIG_SPL_SPI_CS 0
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
#endif
diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h
index d6acbbc..5cdfd1c 100644
--- a/include/configs/db-mv784mp-gp.h
+++ b/include/configs/db-mv784mp-gp.h
@@ -125,8 +125,6 @@
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_BUS 0
-#define CONFIG_SPL_SPI_CS 0
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
diff --git a/include/configs/ds414.h b/include/configs/ds414.h
index 23373cd..ff188e2 100644
--- a/include/configs/ds414.h
+++ b/include/configs/ds414.h
@@ -132,8 +132,6 @@
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_BUS 0
-#define CONFIG_SPL_SPI_CS 0
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
/* DS414 bus width is 32bits */
diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
index fed310f..47d2948 100644
--- a/include/configs/maxbcm.h
+++ b/include/configs/maxbcm.h
@@ -93,8 +93,6 @@
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_BUS 0
-#define CONFIG_SPL_SPI_CS 0
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
index 1caa858..8bbf879 100644
--- a/include/configs/theadorable.h
+++ b/include/configs/theadorable.h
@@ -158,8 +158,6 @@
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_BUS 0
-#define CONFIG_SPL_SPI_CS 0
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x1a000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
diff --git a/tools/kwboot.c b/tools/kwboot.c
index e00958a..26b3949 100644
--- a/tools/kwboot.c
+++ b/tools/kwboot.c
@@ -655,14 +655,6 @@ kwboot_img_patch_hdr(void *img, size_t size)
hdr->blockid = IBR_HDR_UART_ID;
- /*
- * Subtract mkimage header size from destination address
- * as this header is not expected by the Marvell BootROM.
- * This way, the execution address is identical to the
- * one the image is compiled for (TEXT_BASE).
- */
- hdr->destaddr = hdr->destaddr - sizeof(struct image_header);
-
if (image_ver == 0) {
struct main_hdr_v0 *hdr_v0 = img;
@@ -672,6 +664,14 @@ kwboot_img_patch_hdr(void *img, size_t size)
hdr_v0->srcaddr = hdr_v0->ext
? sizeof(struct kwb_header)
: sizeof(*hdr_v0);
+ } else {
+ /*
+ * Subtract mkimage header size from destination address
+ * as this header is not expected by the Marvell BootROM.
+ * This way, the execution address is identical to the
+ * one the image is compiled for (TEXT_BASE).
+ */
+ hdr->destaddr = hdr->destaddr - sizeof(struct image_header);
}
hdr->checksum = kwboot_img_csum8(hdr, hdrsz) - csum;
generated by cgit v0.10.2 at 2024-08-19 03:19:14 (GMT)