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-rw-r--r--arch/arm/dts/zynq-microzed.dts38
-rw-r--r--configs/zynq_microzed_defconfig4
-rw-r--r--include/configs/zynq_microzed.h2
3 files changed, 43 insertions, 1 deletions
diff --git a/arch/arm/dts/zynq-microzed.dts b/arch/arm/dts/zynq-microzed.dts
index 793ab44..cb238cd 100644
--- a/arch/arm/dts/zynq-microzed.dts
+++ b/arch/arm/dts/zynq-microzed.dts
@@ -1,7 +1,7 @@
/*
* Xilinx MicroZED board DTS
*
- * Copyright (C) 2013 Xilinx, Inc.
+ * Copyright (C) 2013 - 2016 Xilinx, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -15,12 +15,27 @@
aliases {
serial0 = &uart1;
spi0 = &qspi;
+ mmc0 = &sdhci0;
};
memory {
device_type = "memory";
reg = <0 0x40000000>;
};
+
+ chosen {
+ bootargs = "earlyprintk";
+ stdout-path = "serial0:115200n8";
+ };
+
+ usb_phy0: phy0 {
+ compatible = "usb-nop-xceiv";
+ #phy-cells = <0>;
+ };
+};
+
+&clkc {
+ ps-clk-frequency = <33333333>;
};
&qspi {
@@ -32,3 +47,24 @@
u-boot,dm-pre-reloc;
status = "okay";
};
+
+&gem0 {
+ status = "okay";
+ phy-mode = "rgmii-id";
+ phy-handle = <&ethernet_phy>;
+
+ ethernet_phy: ethernet-phy@0 {
+ reg = <0>;
+ };
+};
+
+&sdhci0 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+ dr_mode = "host";
+ usb-phy = <&usb_phy0>;
+};
diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig
index 1d70e43..bd261c1 100644
--- a/configs/zynq_microzed_defconfig
+++ b/configs/zynq_microzed_defconfig
@@ -21,3 +21,7 @@ CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ZYNQ_GEM=y
CONFIG_ZYNQ_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_ULPI_VIEWPORT=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=y
diff --git a/include/configs/zynq_microzed.h b/include/configs/zynq_microzed.h
index e66088d..ec7bb1c 100644
--- a/include/configs/zynq_microzed.h
+++ b/include/configs/zynq_microzed.h
@@ -12,6 +12,8 @@
#define CONFIG_SYS_NO_FLASH
+#define CONFIG_ZYNQ_USB
+
#include <configs/zynq-common.h>
#endif /* __CONFIG_ZYNQ_MICROZED_H */