diff options
-rw-r--r-- | board/Marvell/db-88f6820-amc/db-88f6820-amc.c | 3 | ||||
-rw-r--r-- | board/Marvell/db-88f6820-gp/db-88f6820-gp.c | 3 | ||||
-rw-r--r-- | board/gdsys/a38x/controlcenterdc.c | 3 | ||||
-rw-r--r-- | board/solidrun/clearfog/clearfog.c | 3 | ||||
-rw-r--r-- | drivers/ddr/marvell/a38x/ddr3_training.c | 6 | ||||
-rw-r--r-- | drivers/ddr/marvell/a38x/ddr_topology_def.h | 9 |
6 files changed, 23 insertions, 4 deletions
diff --git a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c index cade99c..40fa599 100644 --- a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c +++ b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c @@ -69,7 +69,8 @@ static struct hws_topology_map board_topology_map = { MEM_4G, /* mem_size */ DDR_FREQ_800, /* frequency */ 0, 0, /* cas_l cas_wl */ - HWS_TEMP_LOW} }, /* temperature */ + HWS_TEMP_LOW, /* temperature */ + HWS_TIM_DEFAULT} }, /* timing */ 5, /* Num Of Bus Per Interface*/ BUS_MASK_32BIT /* Busses mask */ }; diff --git a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c index e700781..a1974cb 100644 --- a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c +++ b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c @@ -90,7 +90,8 @@ static struct hws_topology_map board_topology_map = { MEM_4G, /* mem_size */ DDR_FREQ_800, /* frequency */ 0, 0, /* cas_l cas_wl */ - HWS_TEMP_LOW} }, /* temperature */ + HWS_TEMP_LOW, /* temperature */ + HWS_TIM_DEFAULT} }, /* timing */ 5, /* Num Of Bus Per Interface*/ BUS_MASK_32BIT /* Busses mask */ }; diff --git a/board/gdsys/a38x/controlcenterdc.c b/board/gdsys/a38x/controlcenterdc.c index f0efb53..32168d3 100644 --- a/board/gdsys/a38x/controlcenterdc.c +++ b/board/gdsys/a38x/controlcenterdc.c @@ -53,7 +53,8 @@ static struct hws_topology_map ddr_topology_map = { MEM_4G, /* mem_size */ DDR_FREQ_533, /* frequency */ 0, 0, /* cas_l cas_wl */ - HWS_TEMP_LOW} }, /* temperature */ + HWS_TEMP_LOW, /* temperature */ + HWS_TIM_DEFAULT} }, /* timing */ 5, /* Num Of Bus Per Interface*/ BUS_MASK_32BIT /* Busses mask */ }; diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c index 3a8257c..8906636 100644 --- a/board/solidrun/clearfog/clearfog.c +++ b/board/solidrun/clearfog/clearfog.c @@ -83,7 +83,8 @@ static struct hws_topology_map board_topology_map = { MEM_4G, /* mem_size */ DDR_FREQ_800, /* frequency */ 0, 0, /* cas_l cas_wl */ - HWS_TEMP_LOW} }, /* temperature */ + HWS_TEMP_LOW, /* temperature */ + HWS_TIM_DEFAULT} }, /* timing */ 5, /* Num Of Bus Per Interface*/ BUS_MASK_32BIT /* Busses mask */ }; diff --git a/drivers/ddr/marvell/a38x/ddr3_training.c b/drivers/ddr/marvell/a38x/ddr3_training.c index 7e0749f..e70ca4b 100644 --- a/drivers/ddr/marvell/a38x/ddr3_training.c +++ b/drivers/ddr/marvell/a38x/ddr3_training.c @@ -308,6 +308,7 @@ int hws_ddr3_tip_init_controller(u32 dev_num, struct init_cntr_param *init_cntr_ enum hws_speed_bin speed_bin_index = SPEED_BIN_DDR_2133N; enum hws_mem_size memory_size = MEM_2G; enum hws_ddr_freq freq = init_freq; + enum hws_timing timing; u32 cs_mask = 0; u32 cl_value = 0, cwl_val = 0; u32 refresh_interval_cnt = 0, bus_cnt = 0, adll_tap = 0; @@ -569,8 +570,13 @@ int hws_ddr3_tip_init_controller(u32 dev_num, struct init_cntr_param *init_cntr_ DUNIT_CONTROL_HIGH_REG, (init_cntr_prm->msys_init << 7), (1 << 7))); + timing = tm->interface_params[if_id].timing; + if (mode2_t != 0xff) { t2t = mode2_t; + } else if (timing != HWS_TIM_DEFAULT) { + /* Board topology map is forcing timing */ + t2t = (timing == HWS_TIM_2T) ? 1 : 0; } else { /* calculate number of CS (per interface) */ CHECK_STATUS(calc_cs_num diff --git a/drivers/ddr/marvell/a38x/ddr_topology_def.h b/drivers/ddr/marvell/a38x/ddr_topology_def.h index f8894e8..229c3a1 100644 --- a/drivers/ddr/marvell/a38x/ddr_topology_def.h +++ b/drivers/ddr/marvell/a38x/ddr_topology_def.h @@ -37,6 +37,12 @@ enum hws_mem_size { MEM_SIZE_LAST }; +enum hws_timing { + HWS_TIM_DEFAULT, + HWS_TIM_1T, + HWS_TIM_2T +}; + struct bus_params { /* Chip Select (CS) bitmask (bits 0-CS0, bit 1- CS1 ...) */ u8 cs_bitmask; @@ -84,6 +90,9 @@ struct if_params { /* operation temperature */ enum hws_temperature interface_temp; + + /* 2T vs 1T mode (by default computed from number of CSs) */ + enum hws_timing timing; }; struct hws_topology_map { |