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Diffstat (limited to 'arch/arm/include/asm/arch-at91/at91rm9200.h')
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diff --git a/arch/arm/include/asm/arch-at91/at91rm9200.h b/arch/arm/include/asm/arch-at91/at91rm9200.h
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+++ b/arch/arm/include/asm/arch-at91/at91rm9200.h
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+/*
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __AT91RM9200_H__
+#define __AT91RM9200_H__
+
+/* Periperial Identifiers */
+
+#define AT91_ID_SYS 1 /* System Peripheral */
+#define AT91_ID_PIOA 2 /* PIO port A */
+#define AT91_ID_PIOB 3 /* PIO port B */
+#define AT91_ID_PIOC 4 /* PIO port C */
+#define AT91_ID_PIOD 5 /* PIO port D BGA only */
+#define AT91_ID_USART0 6 /* USART 0 */
+#define AT91_ID_USART1 7 /* USART 1 */
+#define AT91_ID_USART2 8 /* USART 2 */
+#define AT91_ID_USART3 9 /* USART 3 */
+#define AT91_ID_MCI 10 /* Multimedia Card Interface */
+#define AT91_ID_UDP 11 /* USB Device Port */
+#define AT91_ID_TWI 12 /* Two Wire Interface */
+#define AT91_ID_SPI 13 /* Serial Peripheral Interface */
+#define AT91_ID_SSC0 14 /* Synch. Serial Controller 0 */
+#define AT91_ID_SSC1 15 /* Synch. Serial Controller 1 */
+#define AT91_ID_SSC2 16 /* Synch. Serial Controller 2 */
+#define AT91_ID_TC0 17 /* Timer Counter 0 */
+#define AT91_ID_TC1 18 /* Timer Counter 1 */
+#define AT91_ID_TC2 19 /* Timer Counter 2 */
+#define AT91_ID_TC3 20 /* Timer Counter 3 */
+#define AT91_ID_TC4 21 /* Timer Counter 4 */
+#define AT91_ID_TC5 22 /* Timer Counter 5 */
+#define AT91_ID_UHP 23 /* OHCI USB Host Port */
+#define AT91_ID_EMAC 24 /* Ethernet MAC */
+#define AT91_ID_IRQ0 25 /* Advanced Interrupt Controller */
+#define AT91_ID_IRQ1 26 /* Advanced Interrupt Controller */
+#define AT91_ID_IRQ2 27 /* Advanced Interrupt Controller */
+#define AT91_ID_IRQ3 28 /* Advanced Interrupt Controller */
+#define AT91_ID_IRQ4 29 /* Advanced Interrupt Controller */
+#define AT91_ID_IRQ5 30 /* Advanced Interrupt Controller */
+#define AT91_ID_IRQ6 31 /* Advanced Interrupt Controller */
+
+#define AT91_USB_HOST_BASE 0x00300000
+
+#define AT91_TC_BASE 0xFFFA0000
+#define AT91_UDP_BASE 0xFFFB0000
+#define AT91_MCI_BASE 0xFFFB4000
+#define AT91_TWI_BASE 0xFFFB8000
+#define AT91_EMAC_BASE 0xFFFBC000
+#define AT91_USART_BASE 0xFFFC0000 /* 4x 0x4000 Offset */
+#define AT91_SCC_BASE 0xFFFD0000 /* 4x 0x4000 Offset */
+#define AT91_SPI_BASE 0xFFFE0000
+
+#define AT91_AIC_BASE 0xFFFFF000
+#define AT91_DBGU_BASE 0xFFFFF200
+#define AT91_PIO_BASE 0xFFFFF400 /* 4x 0x200 Offset */
+#define AT91_PMC_BASE 0xFFFFFC00
+#define AT91_ST_BASE 0xFFFFFD00
+#define AT91_ST_BASE 0xFFFFFD00
+#define AT91_RTC_BASE 0xFFFFFE00
+#define AT91_MC_BASE 0xFFFFFF00
+
+
+/* AT91RM9200 Periperial Multiplexing A */
+/* Port A */
+#define AT91_PMX_AA_EREFCK 0x00000080
+#define AT91_PMX_AA_ETXCK 0x00000080
+#define AT91_PMX_AA_ETXEN 0x00000100
+#define AT91_PMX_AA_ETX0 0x00000200
+#define AT91_PMX_AA_ETX1 0x00000400
+#define AT91_PMX_AA_ECRS 0x00000800
+#define AT91_PMX_AA_ECRSDV 0x00000800
+#define AT91_PMX_AA_ERX0 0x00001000
+#define AT91_PMX_AA_ERX1 0x00002000
+#define AT91_PMX_AA_ERXER 0x00004000
+#define AT91_PMX_AA_EMDC 0x00008000
+#define AT91_PMX_AA_EMDIO 0x00010000
+
+#define AT91_PMX_AA_TXD2 0x00810000
+
+#define AT91_PMX_AA_TWD 0x02000000
+#define AT91_PMX_AA_TWCK 0x04000000
+
+/* Port B */
+#define AT91_PMX_BA_ERXCK 0x00080000
+#define AT91_PMX_BA_ECOL 0x00040000
+#define AT91_PMX_BA_ERXDV 0x00020000
+#define AT91_PMX_BA_ERX3 0x00010000
+#define AT91_PMX_BA_ERX2 0x00008000
+#define AT91_PMX_BA_ETXER 0x00004000
+#define AT91_PMX_BA_ETX3 0x00002000
+#define AT91_PMX_BA_ETX2 0x00001000
+
+/* Port B */
+
+#define AT91_PMX_CA_BFCK 0x00000001
+#define AT91_PMX_CA_BFRDY 0x00000002
+#define AT91_PMX_CA_SMOE 0x00000002
+#define AT91_PMX_CA_BFAVD 0x00000004
+#define AT91_PMX_CA_BFBAA 0x00000008
+#define AT91_PMX_CA_SMWE 0x00000008
+#define AT91_PMX_CA_BFOE 0x00000010
+#define AT91_PMX_CA_BFWE 0x00000020
+#define AT91_PMX_CA_NWAIT 0x00000040
+#define AT91_PMX_CA_A23 0x00000080
+#define AT91_PMX_CA_A24 0x00000100
+#define AT91_PMX_CA_A25 0x00000200
+#define AT91_PMX_CA_CFRNW 0x00000200
+#define AT91_PMX_CA_NCS4 0x00000400
+#define AT91_PMX_CA_CFCS 0x00000400
+#define AT91_PMX_CA_NCS5 0x00000800
+#define AT91_PMX_CA_CFCE1 0x00001000
+#define AT91_PMX_CA_NCS6 0x00001000
+#define AT91_PMX_CA_CFCE2 0x00002000
+#define AT91_PMX_CA_NCS7 0x00002000
+#define AT91_PMX_CA_D16_31 0xFFFF0000
+
+#define CONFIG_SYS_AT91_CPU_NAME "AT91RM9200"
+
+#endif