diff options
Diffstat (limited to 'arch/arm/include/asm/arch-zynqmp/hardware.h')
| -rw-r--r-- | arch/arm/include/asm/arch-zynqmp/hardware.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index c9dc49d..7640eab 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -11,6 +11,11 @@ #define ZYNQ_SERIAL_BASEADDR0 0xFF000000 #define ZYNQ_SERIAL_BASEADDR1 0xFF001000 +#define ZYNQ_GEM_BASEADDR0 0xFF0B0000 +#define ZYNQ_GEM_BASEADDR1 0xFF0C0000 +#define ZYNQ_GEM_BASEADDR2 0xFF0D0000 +#define ZYNQ_GEM_BASEADDR3 0xFF0E0000 + #define ZYNQ_SPI_BASEADDR0 0xFF040000 #define ZYNQ_SPI_BASEADDR1 0xFF050000 @@ -20,6 +25,8 @@ #define ZYNQ_SDHCI_BASEADDR0 0xFF160000 #define ZYNQ_SDHCI_BASEADDR1 0xFF170000 +#define ZYNQMP_SATA_BASEADDR 0xFD0C0000 + #define ZYNQMP_CRL_APB_BASEADDR 0xFF5E0000 #define ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT 0x1000000 @@ -55,6 +62,15 @@ struct iou_scntr { #define EMMC_MODE 0x00000006 #define JTAG_MODE 0x00000000 +#define ZYNQMP_IOU_SLCR_BASEADDR 0xFF180000 + +struct iou_slcr_regs { + u32 mio_pin[78]; + u32 reserved[442]; +}; + +#define slcr_base ((struct iou_slcr_regs *)ZYNQMP_IOU_SLCR_BASEADDR) + #define ZYNQMP_RPU_BASEADDR 0xFF9A0000 struct rpu_regs { |