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-rw-r--r--arch/arm/include/asm/arch-exynos/dmc.h3
-rw-r--r--arch/arm/include/asm/arch-exynos/power.h4
2 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-exynos/dmc.h b/arch/arm/include/asm/arch-exynos/dmc.h
index d78536d..ec3f9b6 100644
--- a/arch/arm/include/asm/arch-exynos/dmc.h
+++ b/arch/arm/include/asm/arch-exynos/dmc.h
@@ -467,6 +467,9 @@ enum mem_manuf {
/* PHY_CON1 register fields */
#define PHY_CON1_RDLVL_RDDATA_ADJ_SHIFT 0
+/* PHY_CON4 rgister fields */
+#define PHY_CON10_CTRL_OFFSETR3 (1 << 24)
+
/* PHY_CON12 register fields */
#define PHY_CON12_CTRL_START_POINT_SHIFT 24
#define PHY_CON12_CTRL_INC_SHIFT 16
diff --git a/arch/arm/include/asm/arch-exynos/power.h b/arch/arm/include/asm/arch-exynos/power.h
index a4b41ad..4f2447b 100644
--- a/arch/arm/include/asm/arch-exynos/power.h
+++ b/arch/arm/include/asm/arch-exynos/power.h
@@ -906,8 +906,8 @@ struct exynos5420_power {
unsigned int sysip_dat3;
unsigned char res11[0xe0];
unsigned int pmu_spare0;
- unsigned int pmu_spare1;
- unsigned int pmu_spare2;
+ unsigned int pmu_spare1; /* Store PHY0_CON4 for read leveling */
+ unsigned int pmu_spare2; /* Store PHY1_CON4 for read leveling */
unsigned int pmu_spare3;
unsigned char res12[0x4];
unsigned int cg_status0;